Zerocat Chipflasher
v0.4.3 (board-edition-1)
Flash free firmware to BIOS chips, kick the Manageability Engine.
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It is a big difference whether you attach a single SPI flash chip to the chipflasher or whether you connect a chip which is soldered onto a sysboard. In the latter case, you will have to test a real life condition - just developing according to chip’s datasheet is not sufficient. Please compare to Power Profiles.
Please compare to: firmware/src/chipspec.c
AT26DF321 (Atmel)
Chip erase may be broken according to datasheet. Use block batch erase instead.
AsRock E350M1 with socketed W25Q32FVDAIQ (Winbond)
We used the 8-pin DIL socket adaptor for flashing. Then the chip was inserted onto the sysboard.
ThinkPad X200 with AT26DF321 (Atmel)
Chip erase may be broken according to chip’s datasheet. Use block batch erase instead.
These laptops are of special interest, because they have the same CPU-Chipset combination (Core Duo or Core2Duo and i945 Northbrigde) as the ThinkPad X60, which is known to lack the Manageability Engine completely. Unfortunately, these machines are not yet supported by coreboot.
Please compare to: https://www.coreboot.org/Laptop
Acer Aspire One ZG5 (Winbond 25x80AVSIG)
Winbond SPI Flash. Size is 8Mbit (1Mbyte), organized in 256 sectors à 4Kbyte, pages of 256 bytes. Status register protection bits are static, thus hardware write protection would work. Besides "Standard SPI", this chip features "Dual Output SPI".
Fujitsu S. Lifebook S7110 (Spansion S25FL008A)
Spansion SPI Flash. Size is 8Mbit (1MByte). Status register protection bits are static, thus hardwired write protection would work. Note that memory is organized in 16 sectors à 512Kbit. Pages have 256 bytes.
HP/Compaq nc6320 (M25PE80)
Micron SPI Flash. Size is 8Mbits, sectors à 4Kbyte, pages are 256 bytes. Features 16 bytes unique ID code(!). Hardware write protection should work. Features flexible software protection modes.
MSI Wind U100 (MX25L8005)
Macronix SPI Flash. Already supported, but not yet tested in situ. Size is 8Mbit (1Mbyte), 256 sectors à 32Kbit (4Kbyte). Status register protection bits are static, thus hardwired write protection would work.
Roda Rocky III+RK886EX (SST49LF080)
SST LPC (Low Pin Count) Flash, 32 pins. Size is 8Mbit. WP# and TBL# pins provide hardware write protect for entire chip and/or top boot block. Features 5 GPI pins for system design flexibility.
Note the LPC Bus is not yet supported by the zerocat chipflasher.
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