Documentation for “Zerocat Chipflasher” as of Sat, 07 Dec 2024 11:40:49 +0100
Repository:
Version: v2.0.5-18-05a6c4fe7
Branch: master
Propeller Spin/PASM Compiler 'OpenSpin' (c)2012-2016 Parallax Inc. DBA Parallax Semiconductor.
Version 1.00.78
Compiling...
../../firmware2/src/serprog-SPI-PASM.spin
|-pins.spin
Done.
Program size is 2520 bytes
TYPE: 43 VALUE: 04C4B400 (00000000) NAME: __CLKFREQ
TYPE: 43 VALUE: 000C3500 (00000000) NAME: POWERUP_SPI
TYPE: 43 VALUE: 00013880 (00000000) NAME: POWERUP_SPILINES
TYPE: 43 VALUE: 003D0900 (00000000) NAME: POWERDOWN_SPI
TYPE: 43 VALUE: 00000001 (00000000) NAME: REPETITIVE_POWERUP
TYPE: 43 VALUE: 00000000 (00000000) NAME: FUNCID__READY
TYPE: 43 VALUE: 00000001 (00000000) NAME: FUNCID__INIT1
TYPE: 43 VALUE: 00000002 (00000000) NAME: FUNCID__POWERON
TYPE: 43 VALUE: 00000003 (00000000) NAME: FUNCID__POWEROFF
TYPE: 43 VALUE: 00000004 (00000000) NAME: FUNCID__TRIGGER
TYPE: 43 VALUE: 00000005 (00000000) NAME: FUNCID__LO_CEN
TYPE: 43 VALUE: 00000006 (00000000) NAME: FUNCID__HI_CEN
TYPE: 43 VALUE: 00000007 (00000000) NAME: FUNCID__LO_WPN
TYPE: 43 VALUE: 00000008 (00000000) NAME: FUNCID__HI_WPN
TYPE: 43 VALUE: 00000009 (00000000) NAME: FUNCID__READ
TYPE: 43 VALUE: 0000000A (00000000) NAME: FUNCID__WRITE
TYPE: 43 VALUE: 0000000B (00000000) NAME: FUNCID__SETSPIFRQ
TYPE: 53 VALUE: 00000101 (00000004) NAME: GO
TYPE: 53 VALUE: 00000002 (00000004) NAME: INIT
TYPE: 53 VALUE: 00000103 (00000004) NAME: POWER_ON
TYPE: 53 VALUE: 00000004 (00000004) NAME: POWER_OFF
TYPE: 53 VALUE: 00000005 (00000004) NAME: FINAL_TRIGGER
TYPE: 53 VALUE: 00000006 (00000004) NAME: CHIP_ENABLE
TYPE: 53 VALUE: 00000007 (00000004) NAME: CHIP_DISABLE
TYPE: 53 VALUE: 00000008 (00000004) NAME: WPN_LOW
TYPE: 53 VALUE: 00000009 (00000004) NAME: WPN_HIGH
TYPE: 53 VALUE: 0000040A (00000004) NAME: IN
TYPE: 53 VALUE: 0000040B (00000004) NAME: OUT
TYPE: 53 VALUE: 0000000C (00000005) NAME: POWER_ON_ONCE
TYPE: 4F VALUE: 0000000D (00000000) NAME: PINS
TYPE: 51 VALUE: 00000000 (00000000) NAME: PIN_CEN1^A
TYPE: 51 VALUE: 00000001 (00000000) NAME: PIN_CEN0^A
TYPE: 51 VALUE: 00000002 (00000000) NAME: PIN_MOSI^A
TYPE: 51 VALUE: 00000003 (00000000) NAME: PIN_WPN^A
TYPE: 51 VALUE: 00000004 (00000000) NAME: PIN_SCLK3^A
TYPE: 51 VALUE: 00000005 (00000000) NAME: PIN_SCLK2^A
TYPE: 51 VALUE: 00000006 (00000000) NAME: PIN_SCLK1^A
TYPE: 51 VALUE: 00000007 (00000000) NAME: PIN_SCLK0^A
TYPE: 51 VALUE: 00000008 (00000000) NAME: PIN_MISO^A
TYPE: 51 VALUE: 00000009 (00000000) NAME: PIN_PLUGTESTN^A
TYPE: 51 VALUE: 0000000A (00000000) NAME: PIN_PNP^A
TYPE: 51 VALUE: 0000000C (00000000) NAME: PIN_HOLDN^A
TYPE: 51 VALUE: 0000000D (00000000) NAME: PIN_D3^A
TYPE: 51 VALUE: 0000000E (00000000) NAME: PIN_D2^A
TYPE: 51 VALUE: 0000000F (00000000) NAME: PIN_D1^A
TYPE: 51 VALUE: 0000001D (00000000) NAME: PIN_TRIGGER^A
TYPE: 51 VALUE: 0000001E (00000000) NAME: PIN_TX^A
TYPE: 51 VALUE: 0000001F (00000000) NAME: PIN_RX^A
TYPE: 51 VALUE: 00000010 (00000000) NAME: SWDIP_A^A
TYPE: 51 VALUE: 00000011 (00000000) NAME: SWDIP_B^A
TYPE: 51 VALUE: 00000012 (00000000) NAME: SWDIP_1^A
TYPE: 51 VALUE: 00000013 (00000000) NAME: SWDIP_2^A
TYPE: 51 VALUE: 00000014 (00000000) NAME: SWDIP_3^A
TYPE: 51 VALUE: 00000015 (00000000) NAME: SWDIP_4^A
TYPE: 51 VALUE: 00000016 (00000000) NAME: SWDIP_5^A
TYPE: 51 VALUE: 00000017 (00000000) NAME: SWDIP_6^A
TYPE: 51 VALUE: 00000010 (00000000) NAME: RST_DISABLE^A
TYPE: 51 VALUE: 00000018 (00000000) NAME: RS232_RST^A
TYPE: 51 VALUE: 0000000B (00000000) NAME: RST_INHIBIT^A
TYPE: 51 VALUE: 0000001B (00000000) NAME: ADC_OUT^A
TYPE: 51 VALUE: 0000001A (00000000) NAME: ADC_CALIBRATION^A
TYPE: 51 VALUE: 00000019 (00000000) NAME: ADC_IN^A
TYPE: 51 VALUE: 00000003 (00000000) NAME: MASK_CEN_AVAIL^A
TYPE: 51 VALUE: 000000F0 (00000000) NAME: MASK_SCLK_AVAIL^A
TYPE: 51 VALUE: 000011FF (00000000) NAME: MASK_SPI_BUS_AVAIL^A
TYPE: 51 VALUE: 000000F0 (00000000) NAME: MASK_SCLK_ACTIVE100^A
TYPE: 51 VALUE: 000000E0 (00000000) NAME: MASK_SCLK_ACTIVE75^A
TYPE: 51 VALUE: 000000C0 (00000000) NAME: MASK_SCLK_ACTIVE50^A
TYPE: 51 VALUE: 00000080 (00000000) NAME: MASK_SCLK_ACTIVE25^A
TYPE: 51 VALUE: 00000000 (00000000) NAME: MASK_SCLK_ACTIVE0^A
TYPE: 51 VALUE: 000000F0 (00000000) NAME: MASK_SCLK_ACTIVE^A
TYPE: 50 VALUE: 00000001 (00000000) NAME: CHECK_CABLE^A
TYPE: 50 VALUE: 00000002 (00000000) NAME: GET_BOARD_CONFIG^A
TYPE: 50 VALUE: 00000103 (00000000) NAME: GET_BOARD_VERSION^A
TYPE: 50 VALUE: 00000104 (00000000) NAME: GET_PIN_RSTINHIBIT^A
TYPE: 50 VALUE: 00000105 (00000000) NAME: GET_MONITOR_HARDWARE^A
TYPE: 50 VALUE: 00000106 (00000000) NAME: GET_POWERUP_TYPE^A
TYPE: 50 VALUE: 00000107 (00000000) NAME: GET_SUSPEND_INHIBIT^A
TYPE: 50 VALUE: 00000108 (00000000) NAME: GET_MODE_SPI^A
TYPE: 50 VALUE: 00000109 (00000000) NAME: GET_DRIVER_STRENGTH^A
TYPE: 50 VALUE: 0000010A (00000000) NAME: GET_BAUDRATE^A
TYPE: 50 VALUE: 0000010B (00000000) NAME: HIGH^A
TYPE: 50 VALUE: 0000010C (00000000) NAME: LOW^A
TYPE: 43 VALUE: 0000000A (00000000) NAME: SPI_PNP
TYPE: 43 VALUE: 00000001 (00000000) NAME: SPI_CEN0
TYPE: 43 VALUE: 00000000 (00000000) NAME: SPI_CEN1
TYPE: 43 VALUE: 00000008 (00000000) NAME: SPI_MISO
TYPE: 43 VALUE: 00000002 (00000000) NAME: SPI_MOSI
TYPE: 43 VALUE: 00000003 (00000000) NAME: SPI_WPN
TYPE: 43 VALUE: 0000000C (00000000) NAME: SPI_HOLDN
TYPE: 43 VALUE: 00000007 (00000000) NAME: SPI_SCLK0
TYPE: 43 VALUE: 00000006 (00000000) NAME: SPI_SCLK1
TYPE: 43 VALUE: 00000005 (00000000) NAME: SPI_SCLK2
TYPE: 43 VALUE: 00000004 (00000000) NAME: SPI_SCLK3
TYPE: 43 VALUE: 0000001D (00000000) NAME: PIN_TRG_FSEL
TYPE: 43 VALUE: 00000003 (00000000) NAME: BITMASK_CEN
TYPE: 43 VALUE: 000000F0 (00000000) NAME: BITMASK_SCLK
TYPE: 43 VALUE: 000011FF (00000000) NAME: BITMASK_SPI
TYPE: 47 VALUE: 00000000 (00000000) NAME: STACK
TYPE: 45 VALUE: 00000000 (00000000) NAME: BOARD_CONFIG
TYPE: 4A VALUE: 00000038 (00000000) NAME: SPI_PASM
TYPE: 4A VALUE: 00000060 (00000028) NAME: LOOP0^B^A^A^A
TYPE: 4A VALUE: 000000BC (00000084) NAME: HI_WPN
TYPE: 4A VALUE: 000000C4 (0000008c) NAME: HI_WPN_RET
TYPE: 4A VALUE: 000000C8 (00000090) NAME: LO_WPN
TYPE: 4A VALUE: 000000D0 (00000098) NAME: LO_WPN_RET
TYPE: 4A VALUE: 000000D4 (0000009c) NAME: LO_CEN
TYPE: 4A VALUE: 000000DC (000000a4) NAME: LO_CEN_RET
TYPE: 4A VALUE: 000000E0 (000000a8) NAME: HI_CEN
TYPE: 4A VALUE: 000000E8 (000000b0) NAME: HI_CEN_RET
TYPE: 4A VALUE: 000000EC (000000b4) NAME: INIT1
TYPE: 4A VALUE: 00000114 (000000dc) NAME: INIT1_RET
TYPE: 4A VALUE: 00000118 (000000e0) NAME: POWERON
TYPE: 4A VALUE: 00000140 (00000108) NAME: SKIP
^A^A^A
TYPE: 4A VALUE: 00000154 (0000011c) NAME: POWERON_RET
TYPE: 4A VALUE: 00000158 (00000120) NAME: POWEROFF
TYPE: 4A VALUE: 00000178 (00000140) NAME: POWEROFF_RET
TYPE: 4A VALUE: 0000017C (00000144) NAME: TRIGGER
TYPE: 4A VALUE: 00000184 (0000014c) NAME: TRIGGER_MODE0
TYPE: 4A VALUE: 000001AC (00000174) NAME: TRIGGER_MODE3
TYPE: 4A VALUE: 000001D4 (0000019c) NAME: TRIGGER_RET
TYPE: 4A VALUE: 000001D8 (000001a0) NAME: WRITE
TYPE: 4A VALUE: 000001F4 (000001bc) NAME: WRITE_MODE3
TYPE: 4A VALUE: 00000224 (000001ec) NAME: WRITE_MODE0
TYPE: 4A VALUE: 00000254 (0000021c) NAME: WRITE_3M_MODE0
TYPE: 4A VALUE: 00000274 (0000023c) NAME: WRITE8_5M_MODE0
TYPE: 4A VALUE: 000002FC (000002c4) NAME: WRITE8_10M_MODE0
TYPE: 4A VALUE: 00000350 (00000318) NAME: WRITE8_40M_MODE0
TYPE: 4A VALUE: 00000374 (0000033c) NAME: WRITE_3M_MODE3
TYPE: 4A VALUE: 00000394 (0000035c) NAME: WRITE8_5M_MODE3
TYPE: 4A VALUE: 0000041C (000003e4) NAME: WRITE8_10M_MODE3
TYPE: 4A VALUE: 00000478 (00000440) NAME: WRITE8_40M_MODE3
TYPE: 4A VALUE: 000004A4 (0000046c) NAME: WRITE_RET
TYPE: 4A VALUE: 000004A8 (00000470) NAME: READ
TYPE: 4A VALUE: 000004C4 (0000048c) NAME: READ_MODE3
TYPE: 4A VALUE: 000004E0 (000004a8) NAME: READ_MODE0
TYPE: 4A VALUE: 000004F8 (000004c0) NAME: READ_3M_MODE0
TYPE: 4A VALUE: 00000520 (000004e8) NAME: READ8_5M_MODE0
TYPE: 4A VALUE: 000005B0 (00000578) NAME: READ8_10M_MODE0
TYPE: 4A VALUE: 00000618 (000005e0) NAME: READ_3M_MODE3
TYPE: 4A VALUE: 00000640 (00000608) NAME: READ8_5M_MODE3
TYPE: 4A VALUE: 000006D0 (00000698) NAME: READ8_10M_MODE3
TYPE: 4A VALUE: 00000734 (000006fc) NAME: READ_RET
TYPE: 4A VALUE: 00000738 (00000700) NAME: READY
TYPE: 4A VALUE: 0000073C (00000704) NAME: MASK_TRIGGER
TYPE: 4A VALUE: 00000740 (00000708) NAME: MASK_SPI_AND_PNP
TYPE: 4A VALUE: 00000744 (0000070c) NAME: MASK_SPI
TYPE: 4A VALUE: 00000748 (00000710) NAME: MASK_SCLK
TYPE: 4A VALUE: 0000074C (00000714) NAME: MASK_CEN
TYPE: 4A VALUE: 00000750 (00000718) NAME: MASK_PNP
TYPE: 4A VALUE: 00000754 (0000071c) NAME: MASK_MOSI
TYPE: 4A VALUE: 00000758 (00000720) NAME: MASK_MISO
TYPE: 4A VALUE: 0000075C (00000724) NAME: MASK_HOLDN
TYPE: 4A VALUE: 00000760 (00000728) NAME: MASK_WPN
TYPE: 4A VALUE: 00000764 (0000072c) NAME: FREQ_3M
TYPE: 4A VALUE: 00000768 (00000730) NAME: FREQ_5M
TYPE: 4A VALUE: 0000076C (00000734) NAME: FREQ_10M
TYPE: 4A VALUE: 00000770 (00000738) NAME: FREQ_40M
TYPE: 4A VALUE: 00000774 (0000073c) NAME: TIME_LINESUP
TYPE: 4A VALUE: 00000778 (00000740) NAME: TIME_POWERDOWN
TYPE: 4B VALUE: 0000077C (00000744) NAME: FUNCID
TYPE: 4B VALUE: 0000077C (00000748) NAME: FREQSPI
TYPE: 4B VALUE: 0000077C (0000074c) NAME: P_STACK
TYPE: 4B VALUE: 0000077C (00000750) NAME: P_READY
TYPE: 4B VALUE: 0000077C (00000754) NAME: P
TYPE: 4B VALUE: 0000077C (00000758) NAME: MASK_SPI_SEL
TYPE: 4B VALUE: 0000077C (0000075c) NAME: MODE_SPI
TYPE: 4B VALUE: 0000077C (00000760) NAME: MBIT
TYPE: 4B VALUE: 0000077C (00000764) NAME: NBIT
TYPE: 4B VALUE: 0000077C (00000768) NAME: VALUE
TYPE: 4B VALUE: 0000077C (0000076c) NAME: TIMETARGET
TYPE: 4B VALUE: 0000077C (00000770) NAME: T_POWERUP
TYPE: 4E VALUE: 00000004 (00000000) NAME: CFGBOARD
TYPE: 4E VALUE: 00000008 (00000000) NAME: MASK_SCLK_EN
TYPE: 4E VALUE: 00000004 (00000000) NAME: FREQ
TYPE: 4E VALUE: 00000004 (00000000) NAME: FREQ
TYPE: 4E VALUE: 00000008 (00000000) NAME: BITLENGTH
TYPE: 4E VALUE: 0000000C (00000000) NAME: BITMASK
TYPE: 4E VALUE: 00000010 (00000000) NAME: FID
TYPE: 4E VALUE: 00000004 (00000000) NAME: FREQ
TYPE: 4E VALUE: 00000008 (00000000) NAME: DATA_OUT
TYPE: 4E VALUE: 0000000C (00000000) NAME: MSBIT
TYPE: 4E VALUE: 00000010 (00000000) NAME: FID
Distilled longs: 0
OBJ bytes: 3133
_CLKMODE: 00
_CLKFREQ: 00B71B00
0000- 20 00 C8 09 A8 08 0D 01 7C 07 04 00 D9 07 00 00 .......|.......
0010- E9 07 00 00 0B 08 00 00 1C 08 00 00 2D 08 00 00 ............-...
0020- 3E 08 00 00 4F 08 00 00 60 08 00 00 71 08 00 00 >...O...`...q...
0030- 86 08 00 00 96 08 00 00 A8 08 20 00 F0 A7 BF A0 .......... .....
0040- D3 AB BF A0 0C AA FF 80 D5 A9 BF A0 04 AA FF 80 ................
0050- D5 AD BF 08 04 AA FF 80 D5 AF BF 08 04 AA FF 80 ................
0060- D5 B9 BF 08 D4 A3 BF 08 0A A2 7F EC 09 A2 7F 86 ................
0070- 1C 7F EB 5C 0A A2 7F 86 68 36 EA 5C 05 A2 7F 86 ...\....h6.\....
0080- 27 52 E8 5C 06 A2 7F 86 2A 58 E8 5C 07 A2 7F 86 'R.\....*X.\....
0090- 24 4C E8 5C 08 A2 7F 86 21 46 E8 5C 02 A2 7F 86 $L.\....!F.\....
00A0- 38 8E E8 5C 03 A2 7F 86 48 A0 E8 5C 04 A2 7F 86 8..\....H..\....
00B0- 51 CE E8 5C 01 A2 7F 86 2D 6E E8 5C 0A 00 7C 5C Q..\....-n.\..|\
00C0- CA E9 BF 68 D4 81 3F 08 00 00 7C 5C CA E9 BF 64 ...h..?...|\...d
00D0- D4 81 3F 08 00 00 7C 5C C5 ED BF 68 D4 81 3F 08 ..?...|\...h..?.
00E0- 00 00 7C 5C C5 ED BF 64 D4 81 3F 08 00 00 7C 5C ..|\...d..?...|\
00F0- C1 E9 BF 64 C1 ED BF 68 C2 ED BF 64 C6 E9 BF 68 ...d...h...d...h
0100- C3 E9 BF 64 C9 E9 BF 68 00 AE 7F 86 C4 E9 AB 64 ...d...h.......d
0110- C4 E9 97 68 D4 81 3F 08 00 00 7C 5C D3 AB BF A0 ...h..?...|\....
0120- 08 AA FF 80 D5 A5 BF 08 C6 ED 3F 62 42 00 54 5C ..........?bB.T\
0130- C6 E9 BF 64 C6 ED BF 68 F1 B7 BF A0 DC B7 BF 80 ...d...h........
0140- 00 B6 7F F8 D6 ED BF 68 F1 B7 BF A0 CF B7 BF 80 .......h........
0150- 00 B6 7F F8 D4 81 3F 08 00 00 7C 5C C3 ED BF 64 ......?...|\...d
0160- C6 E9 BF 68 00 00 00 00 C6 ED BF 64 F1 B7 BF A0 ...h.......d....
0170- D0 B7 BF 80 00 B6 7F F8 D4 81 3F 08 00 00 7C 5C ..........?...|\
0180- 00 AE 7F 86 5D 00 54 5C C1 E9 BF 68 C1 E9 BF 64 ....].T\...h...d
0190- C7 E9 BF 64 00 00 00 00 00 00 00 00 F1 B7 BF A0 ...d............
01A0- 30 B6 FF 80 00 B6 FF F8 D4 81 3F 08 67 00 7C 5C 0.........?.g.|\
01B0- C1 E9 BF 68 C1 E9 BF 64 C7 E9 BF 64 C4 E9 BF 64 ...h...d...d...d
01C0- 00 00 00 00 F1 B7 BF A0 30 B6 FF 80 00 B6 FF F8 ........0.......
01D0- C4 E9 BF 68 D4 81 3F 08 00 00 7C 5C D3 AB BF A0 ...h..?...|\....
01E0- D5 A5 BF 08 04 AA FF 80 D5 B5 BF 08 04 AA FF 80 ................
01F0- D5 B1 BF 08 7B AE 7F EC CB A5 3F 87 CF 00 78 5C ....{.....?...x\
0200- 80 B0 7F 86 CF 00 54 5C CC A5 3F 87 D7 00 78 5C ......T\..?...x\
0210- CD A5 3F 87 F9 00 78 5C FF B4 7F 85 00 B4 7F 86 ..?...x\........
0220- 10 01 6C 5C F9 00 7C 5C CB A5 3F 87 87 00 78 5C ..l\..|\..?...x\
0230- 80 B0 7F 86 87 00 54 5C CC A5 3F 87 8F 00 78 5C ......T\..?...x\
0240- CD A5 3F 87 B1 00 78 5C FF B4 7F 85 00 B4 7F 86 ..?...x\........
0250- C6 00 6C 5C B1 00 7C 5C D8 B5 3F 62 C7 E9 BF 7C ..l\..|\..?b...|
0260- C4 E9 BF 68 01 B0 FF 2A C4 E9 BF 64 87 00 54 5C ...h...*...d..T\
0270- D4 81 3F 08 1B 01 7C 5C 80 B4 7F 62 C7 E9 BF 7C ..?...|\...b...|
0280- C4 E9 BF 68 C4 E9 BF 64 40 B4 7F 62 C7 E9 BF 7C ...h...d@..b...|
0290- C4 E9 BF 68 C4 E9 BF 64 20 B4 7F 62 C7 E9 BF 7C ...h...d ..b...|
02A0- C4 E9 BF 68 C4 E9 BF 64 10 B4 7F 62 C7 E9 BF 7C ...h...d...b...|
02B0- C4 E9 BF 68 C4 E9 BF 64 08 B4 7F 62 C7 E9 BF 7C ...h...d...b...|
02C0- C4 E9 BF 68 C4 E9 BF 64 04 B4 7F 62 C7 E9 BF 7C ...h...d...b...|
02D0- C4 E9 BF 68 C4 E9 BF 64 02 B4 7F 62 C7 E9 BF 7C ...h...d...b...|
02E0- C4 E9 BF 68 C4 E9 BF 64 01 B4 7F 62 C7 E9 BF 7C ...h...d...b...|
02F0- C4 E9 BF 68 C4 E9 BF 64 D4 81 3F 08 1B 01 7C 5C ...h...d..?...|\
0300- C1 E9 BF 68 C1 E9 BF 64 80 B4 7F 62 C7 E9 BF 7C ...h...d...b...|
0310- 00 00 00 00 40 B4 7F 62 C7 E9 BF 7C 20 B4 7F 62 ....@..b...| ..b
0320- C7 E9 BF 7C 10 B4 7F 62 C7 E9 BF 7C 08 B4 7F 62 ...|...b...|...b
0330- C7 E9 BF 7C 04 B4 7F 62 C7 E9 BF 7C 02 B4 7F 62 ...|...b...|...b
0340- C7 E9 BF 7C 01 B4 7F 62 C7 E9 BF 7C D4 81 3F 08 ...|...b...|..?.
0350- 1B 01 7C 5C C1 E9 BF 68 00 00 00 00 C7 E9 BF 7C ..|\...h.......|
0360- C1 E9 BF 64 C1 E9 BF 64 00 00 00 00 00 00 00 00 ...d...d........
0370- D4 81 3F 08 1B 01 7C 5C D8 B5 3F 62 C7 E9 BF 7C ..?...|\..?b...|
0380- C4 E9 BF 64 01 B0 FF 2A C4 E9 BF 68 CF 00 54 5C ...d...*...h..T\
0390- D4 81 3F 08 1B 01 7C 5C 80 B4 7F 62 C7 E9 BF 7C ..?...|\...b...|
03A0- C4 E9 BF 64 C4 E9 BF 68 40 B4 7F 62 C7 E9 BF 7C ...d...h@..b...|
03B0- C4 E9 BF 64 C4 E9 BF 68 20 B4 7F 62 C7 E9 BF 7C ...d...h ..b...|
03C0- C4 E9 BF 64 C4 E9 BF 68 10 B4 7F 62 C7 E9 BF 7C ...d...h...b...|
03D0- C4 E9 BF 64 C4 E9 BF 68 08 B4 7F 62 C7 E9 BF 7C ...d...h...b...|
03E0- C4 E9 BF 64 C4 E9 BF 68 04 B4 7F 62 C7 E9 BF 7C ...d...h...b...|
03F0- C4 E9 BF 64 C4 E9 BF 68 02 B4 7F 62 C7 E9 BF 7C ...d...h...b...|
0400- C4 E9 BF 64 C4 E9 BF 68 01 B4 7F 62 C7 E9 BF 7C ...d...h...b...|
0410- C4 E9 BF 64 C4 E9 BF 68 D4 81 3F 08 1B 01 7C 5C ...d...h..?...|\
0420- 80 B4 7F 62 C1 E9 BF 68 C1 E9 BF 64 C7 E9 BF 7C ...b...h...d...|
0430- C4 E9 BF 64 00 00 00 00 40 B4 7F 62 C7 E9 BF 7C ...d....@..b...|
0440- 20 B4 7F 62 C7 E9 BF 7C 10 B4 7F 62 C7 E9 BF 7C ..b...|...b...|
0450- 08 B4 7F 62 C7 E9 BF 7C 04 B4 7F 62 C7 E9 BF 7C ...b...|...b...|
0460- 02 B4 7F 62 C7 E9 BF 7C 01 B4 7F 62 C7 E9 BF 7C ...b...|...b...|
0470- C4 E9 BF 68 D4 81 3F 08 1B 01 7C 5C C1 E9 BF 68 ...h..?...|\...h
0480- 00 00 00 00 C7 E9 BF 7C C1 E9 BF 64 C4 E9 BF 64 .......|...d...d
0490- C1 E9 BF 64 00 00 00 00 00 00 00 00 00 00 00 00 ...d............
04A0- C4 E9 BF 68 D4 81 3F 08 00 00 7C 5C D3 AB BF A0 ...h..?...|\....
04B0- D5 A5 BF 08 04 AA FF 80 D5 B3 BF 08 04 AA FF 80 ................
04C0- D5 B1 BF 08 2A AF 7F EC CB A5 3F 87 78 01 78 5C ....*.....?.x.x\
04D0- 08 B2 7F 86 CD A5 3F 85 A6 01 48 5C 82 01 60 5C ......?...H\..`\
04E0- 78 01 7C 5C CB A5 3F 87 30 01 78 5C 08 B2 7F 86 x.|\..?.0.x\....
04F0- CD A5 3F 85 5E 01 48 5C 3A 01 60 5C 00 00 00 00 ..?.^.H\:.`\....
0500- F2 91 3F 61 01 B4 FF 34 C4 E9 BF 68 C4 E9 BF 64 ..?a...4...h...d
0510- 30 B3 FF E4 D8 B5 BF 60 D5 B5 3F 08 D4 81 3F 08 0......`..?...?.
0520- BF 01 7C 5C F2 91 3F 61 01 B4 FF 34 C4 E9 BF 68 ..|\..?a...4...h
0530- C4 E9 BF 64 F2 91 3F 61 01 B4 FF 34 C4 E9 BF 68 ...d..?a...4...h
0540- C4 E9 BF 64 F2 91 3F 61 01 B4 FF 34 C4 E9 BF 68 ...d..?a...4...h
0550- C4 E9 BF 64 F2 91 3F 61 01 B4 FF 34 C4 E9 BF 68 ...d..?a...4...h
0560- C4 E9 BF 64 F2 91 3F 61 01 B4 FF 34 C4 E9 BF 68 ...d..?a...4...h
0570- C4 E9 BF 64 F2 91 3F 61 01 B4 FF 34 C4 E9 BF 68 ...d..?a...4...h
0580- C4 E9 BF 64 F2 91 3F 61 01 B4 FF 34 C4 E9 BF 68 ...d..?a...4...h
0590- C4 E9 BF 64 F2 91 3F 61 01 B4 FF 34 C4 E9 BF 68 ...d..?a...4...h
05A0- C4 E9 BF 64 D8 B5 BF 60 D5 B5 3F 08 D4 81 3F 08 ...d...`..?...?.
05B0- BF 01 7C 5C C1 E9 BF 68 C1 E9 BF 64 00 00 00 00 ..|\...h...d....
05C0- 00 00 00 00 00 00 00 00 00 00 00 00 F2 91 3F 61 ..............?a
05D0- 01 B4 FF 34 F2 91 3F 61 01 B4 FF 34 F2 91 3F 61 ...4..?a...4..?a
05E0- 01 B4 FF 34 F2 91 3F 61 01 B4 FF 34 F2 91 3F 61 ...4..?a...4..?a
05F0- 01 B4 FF 34 F2 91 3F 61 01 B4 FF 34 F2 91 3F 61 ...4..?a...4..?a
0600- 01 B4 FF 34 F2 91 3F 61 01 B4 FF 34 D8 B5 BF 60 ...4..?a...4...`
0610- D5 B5 3F 08 D4 81 3F 08 BF 01 7C 5C 00 00 00 00 ..?...?...|\....
0620- C4 E9 BF 64 C4 E9 BF 68 F2 91 3F 61 01 B4 FF 34 ...d...h..?a...4
0630- 78 B3 FF E4 D8 B5 BF 60 D5 B5 3F 08 D4 81 3F 08 x......`..?...?.
0640- BF 01 7C 5C C4 E9 BF 64 C4 E9 BF 68 F2 91 3F 61 ..|\...d...h..?a
0650- 01 B4 FF 34 C4 E9 BF 64 C4 E9 BF 68 F2 91 3F 61 ...4...d...h..?a
0660- 01 B4 FF 34 C4 E9 BF 64 C4 E9 BF 68 F2 91 3F 61 ...4...d...h..?a
0670- 01 B4 FF 34 C4 E9 BF 64 C4 E9 BF 68 F2 91 3F 61 ...4...d...h..?a
0680- 01 B4 FF 34 C4 E9 BF 64 C4 E9 BF 68 F2 91 3F 61 ...4...d...h..?a
0690- 01 B4 FF 34 C4 E9 BF 64 C4 E9 BF 68 F2 91 3F 61 ...4...d...h..?a
06A0- 01 B4 FF 34 C4 E9 BF 64 C4 E9 BF 68 F2 91 3F 61 ...4...d...h..?a
06B0- 01 B4 FF 34 C4 E9 BF 64 C4 E9 BF 68 F2 91 3F 61 ...4...d...h..?a
06C0- 01 B4 FF 34 D8 B5 BF 60 D5 B5 3F 08 D4 81 3F 08 ...4...`..?...?.
06D0- BF 01 7C 5C C1 E9 BF 68 C1 E9 BF 64 00 00 00 00 ..|\...h...d....
06E0- C4 E9 BF 64 00 00 00 00 F2 91 3F 61 01 B4 FF 34 ...d......?a...4
06F0- F2 91 3F 61 01 B4 FF 34 F2 91 3F 61 01 B4 FF 34 ..?a...4..?a...4
0700- F2 91 3F 61 01 B4 FF 34 F2 91 3F 61 01 B4 FF 34 ..?a...4..?a...4
0710- F2 91 3F 61 01 B4 FF 34 F2 91 3F 61 01 B4 FF 34 ..?a...4..?a...4
0720- C4 E9 BF 68 F2 91 3F 61 01 B4 FF 34 D8 B5 BF 60 ...h..?a...4...`
0730- D5 B5 3F 08 D4 81 3F 08 00 00 7C 5C 00 00 00 00 ..?...?...|\....
0740- 00 00 00 20 FF 15 00 00 FF 11 00 00 F0 00 00 00 ... ............
0750- 03 00 00 00 00 04 00 00 04 00 00 00 00 01 00 00 ................
0760- 00 10 00 00 08 00 00 00 D5 DC 32 00 40 4B 4C 00 ..........2.@KL.
0770- 80 96 98 00 00 5A 62 02 80 38 01 00 00 09 3D 00 .....Zb..8....=.
0780- 64 8B 1C 81 39 07 A7 00 64 06 0D 09 35 0D 0C 36 d...9...d...5..6
0790- 0D 0D 37 00 0D 0D 37 21 0D 0D 0C 37 06 69 0C 38 ..7...7!...7.i.8
07A0- C0 69 0C 38 E0 69 0C 38 F0 69 0C 68 37 21 F3 EA .i.8.i.8.i.h7!..
07B0- 38 0C F3 EA 37 00 F3 EA 43 37 01 D1 00 64 06 0D 8...7...C7...d..
07C0- 08 43 38 05 D1 3A 0C 35 00 43 38 06 D1 43 35 37 .C8..:.5.C8..C57
07D0- 01 1A 35 43 37 21 D1 34 C7 38 43 2C 32 36 43 37 ..5C7!.4.8C,26C7
07E0- 21 D1 43 37 21 D0 35 FC 0B 02 04 76 32 64 43 37 !.C7!.5....v2dC7
07F0- 00 D1 00 8B 1C 80 06 0D 06 0A 10 36 08 08 01 05 ...........6....
0800- 0C 01 05 04 09 78 01 05 0C 04 03 01 05 0C 32 37 .....x........27
0810- 21 43 37 21 D1 43 37 21 D0 35 FC 0B 02 04 76 32 !C7!.C7!.5....v2
0820- 37 01 43 37 21 D1 43 37 21 D0 35 FC 0B 02 04 76 7.C7!.C7!.5....v
0830- 32 38 05 43 37 21 D1 43 37 21 D0 35 FC 0B 02 04 28.C7!.C7!.5....
0840- 76 32 38 06 43 37 21 D1 43 37 21 D0 35 FC 0B 02 v28.C7!.C7!.5...
0850- 04 76 32 37 22 43 37 21 D1 43 37 21 D0 35 FC 0B .v27"C7!.C7!.5..
0860- 02 04 76 32 37 02 43 37 21 D1 43 37 21 D0 35 FC ..v27.C7!.C7!.5.
0870- 0B 02 04 76 32 43 67 37 01 1E 43 37 21 D0 35 FC ...v2Cg7..C7!.5.
0880- 0B 02 04 76 43 37 00 D0 33 32 43 67 37 01 1E 43 ...vC7..32Cg7..C
0890- 37 21 D0 35 FC 0B 02 04 76 32 37 00 43 37 21 D1 7!.5....v27.C7!.
08A0- 43 37 21 D0 35 FC 0B 02 04 76 32 00 20 01 0D 00 C7!.5....v2. ...
08B0- 34 00 00 00 3E 00 00 00 59 00 00 00 61 00 00 00 4...>...Y...a...
08C0- 73 00 00 00 83 00 00 00 98 00 00 00 AD 00 00 00 s...............
08D0- C9 00 00 00 DF 00 00 00 0D 01 00 00 16 01 00 00 ................
08E0- 38 09 3D 92 35 FB 61 62 47 32 38 17 38 12 3E 92 8.=.5.abG28.8.>.
08F0- E7 37 25 E8 61 37 00 62 43 38 11 37 03 3E 92 37 .7%.a7.bC8.7.>.7
0900- 21 E8 62 4A 32 64 37 21 E8 36 EC 33 32 38 72 00 !.bJ2d7!.6.328r.
0910- 64 05 03 36 0D 04 38 0B 33 0C 37 03 33 0C 32 38 d..6..8.3.7.3.28
0920- 82 00 64 05 03 36 0D 03 34 33 0C 35 33 0C 32 38 ..d..6..43.53.28
0930- 97 00 64 05 03 36 0D 08 64 37 06 E8 35 FB 33 0C ..d..6..d7..5.3.
0940- 34 33 0C 32 38 AC 00 64 05 03 36 0D 08 64 37 05 43.28..d..6..d7.
0950- E8 35 FB 33 0C 35 33 0C 32 38 C8 00 64 05 03 36 .5.3.53.28..d..6
0960- 0D 0E 64 37 03 E8 0A 04 35 33 04 03 37 21 33 0C ..d7....53..7!3.
0970- 37 21 33 0C 32 38 DE 00 64 05 03 36 0D 09 64 38 7!3.28..d..6..d8
0980- 0C E8 37 00 E2 33 0C 36 33 0C 32 39 01 0C 00 64 ..7..3.63.29...d
0990- 05 03 36 0D 1D 39 01 05 64 37 04 E8 38 05 E2 35 ..6..9..d7..8..5
09A0- 0D 04 36 0D 07 0C 3A 01 C2 00 33 0C 39 E1 00 33 ..6...:...3.9..3
09B0- 0C 0C 3A 01 C2 00 33 0C 32 64 3D D4 1C 64 3D D6 ..:...3.2d=..d=.
09C0- 1C 32 64 3D D4 18 64 3D D6 1C 32 00 90 5F 5F 43 .2d=..d=..2..__C
09D0- 4C 4B 46 52 45 51 10 00 B4 C4 04 50 4F 57 45 52 LKFREQ.....POWER
09E0- 55 50 5F 53 50 49 10 00 35 0C 00 50 4F 57 45 52 UP_SPI..5..POWER
09F0- 55 50 5F 53 50 49 4C 49 4E 45 53 10 80 38 01 00 UP_SPILINES..8..
0A00- 50 4F 57 45 52 44 4F 57 4E 5F 53 50 49 10 00 09 POWERDOWN_SPI...
0A10- 3D 00 52 45 50 45 54 49 54 49 56 45 5F 50 4F 57 =.REPETITIVE_POW
0A20- 45 52 55 50 10 01 00 00 00 46 55 4E 43 49 44 5F ERUP.....FUNCID_
0A30- 5F 52 45 41 44 59 10 00 00 00 00 46 55 4E 43 49 _READY.....FUNCI
0A40- 44 5F 5F 49 4E 49 54 31 10 01 00 00 00 46 55 4E D__INIT1.....FUN
0A50- 43 49 44 5F 5F 50 4F 57 45 52 4F 4E 10 02 00 00 CID__POWERON....
0A60- 00 46 55 4E 43 49 44 5F 5F 50 4F 57 45 52 4F 46 .FUNCID__POWEROF
0A70- 46 10 03 00 00 00 46 55 4E 43 49 44 5F 5F 54 52 F.....FUNCID__TR
0A80- 49 47 47 45 52 10 04 00 00 00 46 55 4E 43 49 44 IGGER.....FUNCID
0A90- 5F 5F 4C 4F 5F 43 45 4E 10 05 00 00 00 46 55 4E __LO_CEN.....FUN
0AA0- 43 49 44 5F 5F 48 49 5F 43 45 4E 10 06 00 00 00 CID__HI_CEN.....
0AB0- 46 55 4E 43 49 44 5F 5F 4C 4F 5F 57 50 4E 10 07 FUNCID__LO_WPN..
0AC0- 00 00 00 46 55 4E 43 49 44 5F 5F 48 49 5F 57 50 ...FUNCID__HI_WP
0AD0- 4E 10 08 00 00 00 46 55 4E 43 49 44 5F 5F 52 45 N.....FUNCID__RE
0AE0- 41 44 10 09 00 00 00 46 55 4E 43 49 44 5F 5F 57 AD.....FUNCID__W
0AF0- 52 49 54 45 10 0A 00 00 00 46 55 4E 43 49 44 5F RITE.....FUNCID_
0B00- 5F 53 45 54 53 50 49 46 52 51 10 0B 00 00 00 47 _SETSPIFRQ.....G
0B10- 4F 01 49 4E 49 54 00 50 4F 57 45 52 5F 4F 4E 01 O.INIT.POWER_ON.
0B20- 50 4F 57 45 52 5F 4F 46 46 00 46 49 4E 41 4C 5F POWER_OFF.FINAL_
0B30- 54 52 49 47 47 45 52 00 43 48 49 50 5F 45 4E 41 TRIGGER.CHIP_ENA
0B40- 42 4C 45 00 43 48 49 50 5F 44 49 53 41 42 4C 45 BLE.CHIP_DISABLE
0B50- 00 57 50 4E 5F 4C 4F 57 00 57 50 4E 5F 48 49 47 .WPN_LOW.WPN_HIG
0B60- 48 00 49 4E 04 4F 55 54 04 53 50 49 5F 50 4E 50 H.IN.OUT.SPI_PNP
0B70- 10 0A 00 00 00 53 50 49 5F 43 45 4E 30 10 01 00 .....SPI_CEN0...
0B80- 00 00 53 50 49 5F 43 45 4E 31 10 00 00 00 00 53 ..SPI_CEN1.....S
0B90- 50 49 5F 4D 49 53 4F 10 08 00 00 00 53 50 49 5F PI_MISO.....SPI_
0BA0- 4D 4F 53 49 10 02 00 00 00 53 50 49 5F 57 50 4E MOSI.....SPI_WPN
0BB0- 10 03 00 00 00 53 50 49 5F 48 4F 4C 44 4E 10 0C .....SPI_HOLDN..
0BC0- 00 00 00 53 50 49 5F 53 43 4C 4B 30 10 07 00 00 ...SPI_SCLK0....
0BD0- 00 53 50 49 5F 53 43 4C 4B 31 10 06 00 00 00 53 .SPI_SCLK1.....S
0BE0- 50 49 5F 53 43 4C 4B 32 10 05 00 00 00 53 50 49 PI_SCLK2.....SPI
0BF0- 5F 53 43 4C 4B 33 10 04 00 00 00 50 49 4E 5F 54 _SCLK3.....PIN_T
0C00- 52 47 5F 46 53 45 4C 10 1D 00 00 00 42 49 54 4D RG_FSEL.....BITM
0C10- 41 53 4B 5F 43 45 4E 10 03 00 00 00 42 49 54 4D ASK_CEN.....BITM
0C20- 41 53 4B 5F 53 43 4C 4B 10 F0 00 00 00 42 49 54 ASK_SCLK.....BIT
0C30- 4D 41 53 4B 5F 53 50 49 10 FF 11 00 00 MASK_SPI.....
______________________________________________________________________________
********************************************************* File starts here ***
Zerocat Chipflasher --- Flash free firmware, kick the Management Engine.
Copyright (C) 2020, 2021, 2022 Kai Mertens
File serprog-SPI-PASM.spin --- access chip via SPI Bus
This file is part of Zerocat Chipflasher.
See end of file for terms of use.
******************************************************************************
# SPI Modes
Mode# CPOL (Clock Polarity) CPHA (Clock Phase)
----- --------------------- ------------------
0 0 0
1 0 1
2 1 0
3 1 1
## Mode Descriptions
Mode 0 --- The clock is active when HIGH. Data is written on the rising edge
of the clock. Data is read on the falling edge of the clock. (Default mode
for most SPI applications and chips.)
Mode 3 --- The clock is active when LOW. Data is written on the falling edge
of the clock. Data is read on the rising edge of the clock.
# Object Summary
Object "../../firmware2/src/serprog-SPI-PASM" Interface:
PUB go(cfgboard)
PUB init
PUB power_on(freq)
PUB power_off
PUB final_trigger
PUB chip_enable
PUB chip_disable
PUB WPn_low
PUB WPn_high
PUB in(freq, bitlength, bitmask, fid)
PUB out(freq, data_out, msbit, fid)
Program: 626 Longs
Variable: 8 Longs
# Objects
Load pin configuration object.
# Constants
Pin Configuration
SPI_PNP
SPI_CEn0
SPI_CEn1
SPI_MISO
SPI_MOSI
SPI_WPn
SPI_HOLDn
SPI_SCLK0
SPI_SCLK1
SPI_SCLK2
SPI_SCLK3
PIN_TRG_FSEL
SPI Bitmasks
BITMASK_CEn
BITMASK_SCLK
BITMASK_SPI
SPI Power Up Timings in Milliseconds
__CLKFREQ (80_000_000):
fixed to 80MHz operation,
should be set according to CLKFREQ value instead
Measurements with Cin=10uF Tantalum, Cout=1000uF
Model | POWERUP | Repetitive? | Decay? | POWERDOWN
--------------|-----------|---------------|----------|-------------
T60/MX | 5.0ms | no | yes | 2.0ms
T60/SST | 1.8ms | yes | yes | 4.5ms
T60/Atmel | 1.6ms | no | yes | 2.0ms
T500/MX | 2.0ms | no | no | 50.0ms
X230 64Mbit | instant | no | no | instant
Measurements with Cin=10uF Tantalum, Cout=100uF + 100nF
Model | POWERUP | Repetitive? | Decay? | POWERDOWN
--------------|-----------|---------------|----------|-------------
GA-G41M-ES2L | > 8ms | no | ? | ?
POWERUP_SPI (10ms):
let voltage rise up on target board
POWERUP_SPILINES (1ms):
give lines some time to settle
Is this required?? A value of 100us is fine for GA-G41M-ES2L.
LetM-bM-^@M-^?s keep this value otherwise a chain of new tests is needed.
POWERDOWN_SPI (50ms):
a) blind out spikes on net Vcc_SPI (100us)
b) let voltage come down on target board
REPETITIVE_POWERUP (1)
ENUM t_FUNCID
FUNCID__READY, must be zero
FUNCID__init1
FUNCID__poweron
FUNCID__poweroff
FUNCID__trigger
FUNCID__lo_CEn
FUNCID__hi_CEn
FUNCID__lo_WPn
FUNCID__hi_WPn
FUNCID__read
FUNCID__write
FUNCID__setspifrq
# Variables
stack[] --- Provide some stack space
board_config
# Functions
_________________
PUB go(cfgboard)
Initialize board_config.
Initialize static parameter.
Launch PASM code into new cog: SPI_PASM
_________
PUB init
Launch PASM routine: init1
___________________
PUB power_on(freq)
Repetitive power on.
______________
PUB power_off
Launch PASM routine: poweroff
__________________
PUB final_trigger
Launch a final trigger to break endless loop.
________________
PUB chip_enable
Launch PASM routine: lo_CEn
_________________
PUB chip_disable
Launch PASM routine: hi_CEn
____________
PUB WPn_low
Launch PASM routine: lo_WPn
_____________
PUB WPn_high
Launch PASM routine: hi_WPn
______________________________________
PUB in(freq, bitlength, bitmask, fid)
Launch PASM routine: read
Return value.
____________________________________
PUB out(freq, data_out, msbit, fid)
Launch PASM routine: write
# PASM/Data
''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
SPI_PASM --- PASM code entry
Parameter:
* stack[3] = function ID / Ready Flag
* stack[4] = mask_SPI_SEL
* stack[5] = mode_SPI
* stack[6] = t_powerup
''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
hi_WPn --- deassert WPn
Description:
Sets #WP high, disables hardware write protection (if any).
Note timing.
Parameter:
* stack[3] = function ID, will be set to 'ready' when done
''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
lo_WPn --- assert WPn
Description:
Sets #WP low, enables hardware write protection (if configured).
Note timing.
Parameter:
* stack[3] = function ID, will be set to 'ready' when done
''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
lo_CEn --- chip enable/select
Description:
Activates output, CE# goes low.
Note timing.
Parameter:
* stack[3] = function ID, will be set to 'ready' when done
''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
hi_CEn --- chip disable/deselect
Description:
Uses tristate pin, as CE# goes high via pull-up.
Note timing.
Parameter:
* stack[3] = function ID, will be set to 'ready' when done
''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
init1 --- initialize SPI bus
Description:
* set up free wheeling counter modules to provide high frequency clock rates
* initialize SPI bus pins to be in tristate mode
* clear SPI bus latches
* disable hold function
* initialize clock pins
Parameter:
* stack[3] = function ID, will be set to 'ready' when done
''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
poweron --- power SPI bus on
Entry condition:
* all SPI bus pins are in tristate mode
* output latches are initialized
* PNP MOSFET disabled, thus chip and #CE pull-up are not powered
Power-up SPI bus:
* activate PNP MOSFET, thus power chip on, with delay
* activate SPI bus pins, with delay
* the number of SPI clock driver pins is reduced for high frequencies
Parameter:
* stack[2] = targeted SPI frequency
* stack[3] = function ID, will be set to 'ready' when done
''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
poweroff --- power off the SPI bus
Description:
Leaves Propeller pins in tristate condition,
as they might be used by other cogs.
Parameter:
* stack[3] = function ID, will be set to 'ready' when done
''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
trigger --- trigger a final, dummy pulse train
''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
write --- send a value to SPI bus
Description:
This routine starts with HUB instructions, which might take odd numbers
of cycles. Are we just lucky that the code for high speed data transfer
is in sync with the free wheeling clock modules? Do we have to expect an
out-of-sync exception at some point in future??
* Case msbit == 128 has been rolled out to speed up byte transfer.
* Cases $00 and $ff have been rolled out to speed up byte transfer even
more.
Parameter:
* stack[2] = most significant bit, i.e. 128 for a byte to transfer
* stack[1] = data to transmit
* stack[0] = freqSPI
* stack[3] = function ID, will be set to 'ready' when done
''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
read --- read a value from SPI bus, apply bitmask
Description:
This routine starts with HUB instructions, which might take odd numbers
of cycles. Are we just lucky that the code for high speed data transfer
is in sync with the free wheeling clock modules? Do we have to expect an
out-of-sync exception at some point in future??
Bit length 8 has been rolled out to speed up transfer, using a higher
frequency.
Parameter:
* stack[2] = bitmask / return value
* stack[1] = bitlength
* stack[0] = freqSPI
* stack[3] = function ID, will be set to 'ready' when done
* stack[5] = SPI mode
The return value is not cleared upon entry.
Therefore, bitmask should correspond to bitlength,
as higher bits are not neccessarily zero.
''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
Named registers, initialized
ready --- used to flag valid data or end of function
mask_TRIGGER --- pin bit mask
mask_SPI_AND_PNP --- compound bit mask
mask_SPI --- compound bit mask
mask_SCLK --- compound bit mask
mask_CEn --- compound bit mask
mask_PNP --- pin bit mask
mask_MOSI --- pin bit mask
mask_MISO --- pin bit mask
mask_HOLDn --- pin bit mask
mask_WPn --- pin bit mask
time_LINESUP
time_POWERDOWN
''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
Named registers, reserved space, not initialized
funcID --- PASM function to call
freqSPI --- targeted SPI frequency
p_stack --- stack base address, as passed via PAR
p_ready --- pointer into stack, func ID and ready flag
p --- pointer into stack
mask_SPI_SEL --- selected pins of SPI Bus, i.e. different sets of clock pins
mode_SPI
mbit --- most significant bit / bit mask
nbit --- number of bit
value --- in/out data
timetarget --- temporary future time stamp
t_powerup --- give SPI voltage some time to rise
******************************************************************************
Terms of Use:
Zerocat Chipflasher is free software: you can redistribute it and/or
modify it under the terms of the GNU General Public License as
published by the Free Software Foundation, either version 3 of the
License, or (at your option) any later version.
Zerocat Chipflasher is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
You should have received a copy of the GNU General Public License along
with Zerocat Chipflasher. If not, see <http://www.gnu.org/licenses/>.
************************************************************** End of File ***