Documentation for “Zerocat Chipflasher” as of Wed, 01 Jan 2025 22:07:31 +0100
Repository:
Version: v2.1.0-0-850cd7bce
Branch: master
Propeller Spin/PASM Compiler 'OpenSpin' (c)2012-2016 Parallax Inc. DBA Parallax Semiconductor.
Version 1.00.78
Compiling...
../../firmware2/src/serprog-SPI-PASM-Pulse.spin
|-pins.spin
Done.
Program size is 612 bytes
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Zerocat Chipflasher --- Flash free firmware, kick the Management Engine.
Copyright (C) 2020, 2021, 2022 Kai Mertens
File serprog-SPI-PASM-Pulse.spin --- Emit SPI clock pulse train,
triggered by pin transition
This file is part of Zerocat Chipflasher.
See end of file for terms of use.
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# Object Summary
Object "../../firmware2/src/serprog-SPI-PASM-Pulse" Interface:
PUB go
PUB init(pin_SCLK)
PUB power_on
PUB power_off
PUB pulse_on
PUB pulse_off
Program: 149 Longs
Variable: 2 Longs
# Objects
Load pin configuration object.
# Constants
Pin Configuration
PIN_TRISTATE --- Idle Counter Pin
PIN_TRG_FSEL --- Trigger and Frequency Select
ENUM t_FUNCID
FUNCID__READY, must be zero
FUNCID__init1
FUNCID__poweron
FUNCID__poweroff
FUNCID__pulse
# Variables
stack[] --- Provide some stack space
# Functions
_______
PUB go
Launch PASM code into new cog: SPI_Pulse
___________________
PUB init(pin_SCLK)
Launch PASM routine: init1
_____________
PUB power_on
Launch PASM routine: poweron
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PUB power_off
Launch PASM routine: poweroff
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PUB pulse_on
Launch PASM routine: pulse
The routine will keep monitoring the trigger pin in an endless loop.
Use `pulse_off` and a trigger pulse to quit.
______________
PUB pulse_off
Clear function ID with ready flag.
A trigger pulse is required to quit the `pulse` routine.
# PASM/Data
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SPI_Pulse --- PASM code entry
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init1 --- get parameter, initialize clock pin, set counter mode
Description:
Stores clock pin and corresponding bitmask at runtime.
Parameter:
* stack[1] = SPI clock pin number
* stack[0] = function ID / Ready Flag
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poweron --- enable clock pin
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poweroff --- disable clock pin
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pulse --- Emit Pulse Train, 10MHz or 40MHz
Description:
Once started, routine keeps monitoring the trigger pin. If a low-to-high edge
has been detected, a train of 8 clock pulses is provided on the clock pin. To
quit the endless loop, set the ready flag from outside and provide one final
trigger. The routine will end by issuing a dummy train at high speed.
Parameter:
None, but trigger pin is monitored for frequency select right after trigger.
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Named registers, initialized
mask_TRIGGER --- bitmask for trigger and frequency select pin
ready --- used to flag valid data or end of function
v_frqa --- 10MHz NCO
v_frqb --- 40MHz NCO
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Named registers, reserved space, not initialized
funcID --- PASM function to call
p_stack --- stack base address, as passed via PAR
p --- pointer into stack
pinSCLK --- clock pin
mask_pinSCLK --- clock pin bitmask
******************************************************************************
Terms of Use:
Zerocat Chipflasher is free software: you can redistribute it and/or
modify it under the terms of the GNU General Public License as
published by the Free Software Foundation, either version 3 of the
License, or (at your option) any later version.
Zerocat Chipflasher is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
You should have received a copy of the GNU General Public License along
with Zerocat Chipflasher. If not, see <http://www.gnu.org/licenses/>.
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