Documentation for “Zerocat Chipflasher” as of Tue, 11 Feb 2025 14:22:18 +0100
Repository:
Version: v2.1.1-0-7ab6f93df
Branch: master
Propeller Spin/PASM Compiler 'OpenSpin' (c)2012-2016 Parallax Inc. DBA Parallax Semiconductor.
Version 1.00.78
Compiling...
../../firmware2/src/pins.spin
|-time.spin
Done.
Program size is 556 bytes
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Zerocat Chipflasher --- Flash free firmware, kick the Management Engine.
Copyright (C) 2020, 2021, 2022, 2024, 2025 Kai Mertens
File pins.spin --- Define Propeller Pins
Compare to: firmware/src/libkick/proppins.h
This file is part of the Zerocat Chipflasher.
See end of file for terms of use.
******************************************************************************
# Object Configuration (set via Makefile)
* Tell us which RS232 baudrate to use at start:
115200, 57600, 38400 or according to DIP Switch:
Switch #1: open = 57600, closed = 115200
* Tell us which SPI power-up type to use:
One Shot, Pulses, or according to DIP Switch:
Switch #2: open = One Shot, closed = Pulses
* Tell us which SPI power-off type to use:
Auto, Static, or according to DIP Switch:
Switch #3: open = auto, closed = static
* Tell us which SPI mode to use:
Mode 0, Mode 3, or according to DIP Switch:
Switch #4: open = Mode 0, closed = Mode 3
* Tell us which SPI clock driver strength to use:
100%, 75%, 50%, 25% or according to DIP Switch:
Switch #5..#6: oo = 25%, xo = 50%, ox = 75%, xx = 100%
# Interface Description
Object "../../firmware2/src/pins" Interface:
PUB get_board_version :
PUB init(vboard)
PUB get_board_config(vboard) :
PUB check_cable :
PUB get_RPULL :
PUB is_monitor_VCCSPI
PUB is_monitor_RPULL
PUB is_monitor_RST
PUB get_RAM_MASK_CEn_AVAIL
PUB get_RAM_MASK_SPI_AVAIL
PUB get_RAM_RST_INHIBIT
PUB get_SPI_power_off_type(cfg)
PUB get_SPI_power_on_type(cfg)
PUB get_SPI_power_config(cfg)
PUB get_SPI_mode(cfg)
PUB get_clk_driver(cfg)
PUB get_baudrate(cfg)
Program: 135 Longs
Variable: 6 Longs
# Loaded Objects
Load time object.
# Constants
# Definitions in respect to PCB version
* PCBv2.1
* PCBv2.0
* PCBv2
* PCBv1
* Common
The PCB version is detected during runtime, that is why this object should
set RAM locations to appropriate values:
* RAM_PCB_VERSION
* RAM_RST_INIHIBIT
* RAM_ISMON_VCCSPI
* RAM_ISMON_RPULL
* RAM_ISMON_RST
* RAM_MASK_CEn_AVAIL
* RAM_MASK_SPI_AVAIL
# PCBv2.1
SPI_CEn1_PCBv2_1 -- Second Enable Pin, active low
SPI_RPULL -- Used to load C_pull and to read R_pull value
* Hardcoded RC decay values for C_pull = 22nF, R_pull = 83..570 Ohm
# PCBv2.0
SPI_CEn1_PCBv2_0 -- Second Enable Pin, active low
# PCBv2
RS232_RST -- Sense RST input from host
RST_INHIBIT -- Inhibit signal pin on board v2 for net RS232_RST
ADC_OUT -- Sigma-delta ADC circuit, counter output
ADC_CALIBRATION -- Sigma-delta ADC circuit, calibration pin, providing 0V/3.3V, tri-state when idle
ADC_IN -- Sigma-delta ADC circuit, counter input
* DIP Switch 1: RS232 Baudrate
open = H, closed = L
RS232 Baudrate | SWDIP_1
----------------|-----------
57600 | H
115200 | L
* DIP Switch 2: SPI power-up Type
open = H, closed = L
Power-up Type | SWDIP_2
----------------|-----------
one shot | H
pulses | L
* DIP Switch 3: SPI power-off type
open = H, closed = L
Power-off Type | SWDIP_3
----------------|-----------
auto | H
static | L
* DIP Switch 4: SPI Mode
open = H, closed = L
SPI Mode | SWDIP_4
----------|-----------
0 | H
3 | L
* DIP Switches 5..6: SPI Clock Driver
open = H, closed = L
SPI Clock Driver | SWDIP_5 | SWDIP_6
------------------|-----------|-----------
25% | H | H
50% | L | H
75% | H | L
100% | L | L
# PCBv1
SPI_CEn1_PCBv1 -- Second Chip Enable Pin, active low
RST_DISABLE -- Inhibit signal pin on board v1 for net RS232_RST
* Hardcoded DIP switch configuration for PCBv1
- RS232 baudrate 115200
- Pulsed SPI power-on
- Automatic SPI power-off
- SPI mode 3
- Full clock driver strength
# Common
* DIP Switches A and B: Board Version
Testboard: open = H, closed straight = L, closed angular = H
open = H, closed = L
Board Version | SWDIP_B | SWDIP_A
---------------|-----------|-----------
V1 | L | L
V2 | L | H
V2.1 | L | H_delayed
V3 | H | L
V4 | H | H
On PCBv1, SWDIP_A is connected to GND via resistor.
On PCBv1, SWDIP_B is not connected but will hopefully read low at start.
On PCBv2.1, SWDIP_A is connected to an RC network.
It can be detected by driving SWDIP_A low and then waiting for a low-to-high transition.
## Fast Addressable Pins 0..8
## Slow Addressable Pins 9..31
## Compound Bitmasks
MASK_CLK_AVAIL -- bitmask for all available SPI clock pins
MASK_CLK_ACTIVE...:
We can drive the SPI clock pin with different current setups, 4 pins
are available.
* T500-8MB-Winbond requires one pin
* X60s-2MB-SST requires one pin
* X230-4MB-Macronix requires two pins
* X200-8MB-Winbond requires three pins
MASK_CLK_ACTIVE100 -- bitmask for selected SPI clock pins in use: four
MASK_CLK_ACTIVE75 -- bitmask for selected SPI clock pins in use: three
MASK_CLK_ACTIVE50 -- bitmask for selected SPI clock pins in use: two
MASK_CLK_ACTIVE25 -- bitmask for selected SPI clock pins in use: one
MASK_CLK_ACTIVE0 -- bitmask for selected SPI clock pins in use: none
## SPI Modes
# Globals
# Functions
_________________________
PUB get_board_version :
Retrieve board version from PCB,
set RAM_PCB_VERSION.
_________________
PUB init(vboard)
Configure RAM locations for PCB version `vboard', pins and masks.
Special: board-v2.1 uses an extra RC network at SWDIP_A
version values:
* board-v1 = $01
* board-v2 = $02
* board-v2.1 = $12
* board-v3 = $03
* board-v4 = $04
________________________________
PUB get_board_config(vboard) :
Retrieve board configuration from DIP switches.
___________________
PUB check_cable :
Check SPI Cable
FALSE = Cable not present or twisted plug
TRUE = Cable present
_________________
PUB get_RPULL :
______________________
PUB is_monitor_VCCSPI
Is SPI voltage monitor hardware available?
_____________________
PUB is_monitor_RPULL
Is SPI R_pull monitor hardware available?
___________________
PUB is_monitor_RST
Is pin RS232_RST monitored?
___________________________
PUB get_RAM_MASK_CEn_AVAIL
Get RAM_MASK_CEn_AVAIL.
___________________________
PUB get_RAM_MASK_SPI_AVAIL
Get RAM_MASK_SPI_AVAIL.
________________________
PUB get_RAM_RST_INHIBIT
Which pin is used to inhibit net RS232_RST?
________________________________
PUB get_SPI_power_off_type(cfg)
Check DIP switch 3:
Vcc_SPI Suspend allowed: return FALSE
Vcc_SPI Suspend inhibited: return TRUE
_______________________________
PUB get_SPI_power_on_type(cfg)
Check DIP switch 2:
Returns TRUE for type repetitive, otherwise FALSE.
______________________________
PUB get_SPI_power_config(cfg)
Check DIP switches 2 and 3:
sw2 | sw3
----|----
H | H = one shot, auto
L | H = pulses, auto
H | L = one shot, static
L | L = pulses, static
______________________
PUB get_SPI_mode(cfg)
Check DIP switch 4, set SPI mode.
________________________
PUB get_clk_driver(cfg)
Check DIP switches 5 and 6, set driver strength.
______________________
PUB get_baudrate(cfg)
Return baudrate according to DIP switch 1.
******************************************************************************
Terms of Use:
Zerocat Chipflasher is free software: you can redistribute it and/or
modify it under the terms of the GNU General Public License as
published by the Free Software Foundation, either version 3 of the
License, or (at your option) any later version.
Zerocat Chipflasher is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
You should have received a copy of the GNU General Public License along
with Zerocat Chipflasher. If not, see <http://www.gnu.org/licenses/>.
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