Documentation for “Zerocat Chipflasher” as of Wed, 01 Jan 2025 22:07:29 +0100
Repository:
Version: v2.1.0-0-850cd7bce
Branch: master
Propeller Spin/PASM Compiler 'OpenSpin' (c)2012-2016 Parallax Inc. DBA Parallax Semiconductor. Version 1.00.78 Compiling... ../../firmware2/src/pins.spin Done. Program size is 240 bytes ______________________________________________________________________________ ********************************************************* File starts here *** Zerocat Chipflasher --- Flash free firmware, kick the Management Engine. Copyright (C) 2020, 2021, 2022, 2024 Kai Mertens File pins.spin --- Define Propeller Pins Compare to: firmware/src/libkick/proppins.h This file is part of the Zerocat Chipflasher. See end of file for terms of use. ****************************************************************************** # Object Configuration (set via Makefile) * Tell us which RS232 baudrate to use at start: 115200, 57600, 38400 or according to DIP Switch: Switch #1: open = 57600, closed = 115200 * Tell us which SPI power-up type to use: One Shot, Pulses, or according to DIP Switch: Switch #2: open = One Shot, closed = Pulses * Tell us which SPI power-off type to use: Auto, Static, or according to DIP Switch: Switch #3: open = auto, closed = static * Tell us which SPI mode to use: Mode 0, Mode 3, or according to DIP Switch: Switch #4: open = Mode 0, closed = Mode 3 * Tell us which SPI clock driver strength to use: 100%, 75%, 50%, 25% or according to DIP Switch: Switch #5..#6: oo = 25%, xo = 50%, ox = 75%, xx = 100% # Interface Description Object "../../firmware2/src/pins" Interface: PUB check_cable : PUB get_board_version : PUB get_board_config(vboard) : PUB get_pin_RSTinhibit(vboard) PUB get_monitor_hardware(vboard) PUB get_SPI_power_off_type(cfg) PUB get_SPI_power_on_type(cfg) PUB get_SPI_power_config(cfg) PUB get_SPI_mode(cfg) PUB get_clk_driver(cfg) PUB get_baudrate(cfg) PUB high(pin_number) PUB low(pin_number) Program: 56 Longs Variable: 0 Longs # Loaded Objects # Constants * Pins in respect to PCB version TESTBOARD: RST_DISABLE_TESTBOARD PCBv1 (aka BOARD_V1): RST_DISABLE --- Inhibit signal pin on board v1 for net RS232_RST, on Testboard simulating PCBv1, reconfigure! PCBv2 (aka BOARD_V2): RS232_RST --- Sense RST input from host RST_INHIBIT --- Inhibit signal pin on board v2 for net RS232_RST ADC_OUT --- Sigma-delta ADC circuit, counter output ADC_CALIBRATION --- Sigma-delta ADC circuit, calibration pin, providing 0V/3.3V, tri-state when idle ADC_IN --- Sigma-delta ADC circuit, counter input * Fast Addressable Pins 0..8 * Slow Addressable Pins 9..31 * DIP Switches A and B, otherwise hardwired: Board Version Testboard: open = H, closed straight = L, closed angular = H open = H, closed = L Board Version | SWDIP_B | SWDIP_A ---------------|-----------|----------- V1 | L | L V2 | L | H V3 | H | L V4 | H | H Switch SWDIP_B is tristate on PCBv1, but will hopefully read low. * Hardcoded DIP switch configuration for PCBv1 - RS232 baudrate 115200 - Pulsed SPI power-on - Automatic SPI power-off - SPI mode 3 - Full clock driver strength * DIP Switch 1: RS232 Baudrate open = H, closed = L RS232 Baudrate | SWDIP_1 ----------------|----------- 57600 | H 115200 | L * DIP Switch 2: SPI power-up Type open = H, closed = L Power-up Type | SWDIP_2 ----------------|----------- one shot | H pulses | L * DIP Switch 3: SPI power-off type open = H, closed = L Power-off Type | SWDIP_3 ----------------|----------- auto | H static | L * DIP Switch 4: SPI Mode open = H, closed = L SPI Mode | SWDIP_4 ----------|----------- 0 | H 3 | L * DIP Switches 5..6: SPI Clock Driver open = H, closed = L SPI Clock Driver | SWDIP_5 | SWDIP_6 ------------------|-----------|----------- 25% | H | H 50% | L | H 75% | H | L 100% | L | L * Compound Bitmasks MASK_CEn_AVAIL --- bitmask for all available CEn pins MASK_SCLK_AVAIL --- bitmask for all available SPI clock pins MASK_SPI_BUS_AVAIL --- bitmask for pins that form the SPI Bus MASK_SCLK_ACTIVE100 --- bitmask for selected SPI clock pins in use: four MASK_SCLK_ACTIVE75 --- bitmask for selected SPI clock pins in use: three MASK_SCLK_ACTIVE50 --- bitmask for selected SPI clock pins in use: two MASK_SCLK_ACTIVE25 --- bitmask for selected SPI clock pins in use: one MASK_SCLK_ACTIVE0 --- bitmask for selected SPI clock pins in use: none * SPI Modes # Functions ___________________ PUB check_cable : Check SPI Cable FALSE = Cable not present TRUE = Cable present _________________________ PUB get_board_version : Get board version from hardwired PCB, not inverted! ________________________________ PUB get_board_config(vboard) : Retrieve board configuration from DIP switches. _______________________________ PUB get_pin_RSTinhibit(vboard) Which pin is used to inhibit net RS232_RST? _________________________________ PUB get_monitor_hardware(vboard) Is SPI voltage monitor hardware available? ________________________________ PUB get_SPI_power_off_type(cfg) Check DIP switch 3: Vcc_SPI Suspend allowed: return FALSE Vcc_SPI Suspend inhibited: return TRUE _______________________________ PUB get_SPI_power_on_type(cfg) Check DIP switch 2: Returns TRUE for type repetitive, otherwise FALSE. ______________________________ PUB get_SPI_power_config(cfg) Check DIP switches 2 and 3: sw2 | sw3 ----|---- H | H = one shot, auto L | H = pulses, auto H | L = one shot, static L | L = pulses, static ______________________ PUB get_SPI_mode(cfg) Check DIP switch 4, set SPI mode. ________________________ PUB get_clk_driver(cfg) Check DIP switches 5 and 6, set driver strength. ______________________ PUB get_baudrate(cfg) Return baudrate according to DIP switch 1. _____________________ PUB high(pin_number) Set pin high (1). Direction register bit is configured to output. ____________________ PUB low(pin_number) Set pin low (0). Direction register bit is configured to output. ****************************************************************************** Terms of Use: Zerocat Chipflasher is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation, either version 3 of the License, or (at your option) any later version. Zerocat Chipflasher is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with Zerocat Chipflasher. If not, see <http://www.gnu.org/licenses/>. ************************************************************** End of File ***