Documentation for “Zerocat Chipflasher” as of Sat, 29 Mar 2025 14:42:10 +0100
Repository:
Version: v2.1.6-0-c57b46eb4
Branch: master
Propeller Spin/PASM Compiler 'OpenSpin' (c)2012-2016 Parallax Inc. DBA Parallax Semiconductor.
Version 1.00.78
Compiling...
../../firmware2/src/SPIclock8.spin
Done.
Program size is 368 bytes
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Zerocat Chipflasher --- Flash free firmware, kick the Management Engine.
Copyright (C) 2025 Kai Mertens
File SPIclock8.spin --- Emit SPI clock pulse train,
triggered by pin transition.
This file is part of Zerocat Chipflasher.
See end of file for terms of use.
******************************************************************************
# Object Summary
Object "../../firmware2/src/SPIclock8" Interface:
PUB get_clk_driver_mask(bitpattern)
PUB start :
PUB stop
PUB on(clk_bitpattern)
PUB off
PUB pulsetrain(n)
Program: 88 Longs
Variable: 4 Longs
# Objects
# Constants
* Cycles per Bit
* Pin SPI_TRG_FSEL --- Trigger and Frequency Select
* SPI clock pins
* Compound Bitmasks
- MASK_CLK_AVAIL -- bitmask for all available SPI clock pins
- MASK_CLK_ACTIVE
We can drive the SPI clock pin with different current setups, 4 pins
are available, i.e.:
+ T500-8MB-Winbond requires one pin
+ X60s-2MB-SST requires one pin
+ X230-4MB-Macronix requires two pins
+ X200-8MB-Winbond requires three pins
* ENUM JOB_type
# Variables
* stack[]
* cog ID
# Functions
____________________________________
PUB get_clk_driver_mask(bitpattern)
Return clock pin mask in respect to cfg.
_____________
PUB start :
Launch PASM code into new cog: _SPI_clock8
_________
PUB stop
Stop cog.
_______________________
PUB on(clk_bitpattern)
Launch PASM routine: _on
Selected clock pins go low.
________
PUB off
Launch PASM routine: _off
All clock pins go high impedance.
__________________
PUB pulsetrain(n)
Launch PASM routine: _pulses
The routine will keep monitoring the trigger pin once invoked.
# PASM/Data
''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
_SPI_clock8 --- PASM code entry
Upon launch in cog, OUTA is zero, DIRA is zero.
No need to initialize.
''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
_on --- enable clock pins
''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
_off --- disable clock pin
''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
_pulsetrain --- Emit n pulse trains of 8 periods each.
Pulse trains as created in a collaborative effort of SPIio and SPIclock8:
____ ___
CEn: \___________________________________________________/
___ _ _ _ _ _ _ _ _________
Mode 0: \______/ \__/ \__/ \__/ \__/ \__/ \__/ \__/ \____
______ _ _ _ _ _ _ _ ______________
Mode 3: \___/ \__/ \__/ \__/ \__/ \__/ \__/ \__/
''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
Named registers, initialized
_mask_CLK_ALL --- clock pin bitmask, all available clock pins
_mask_TRIGGER --- bitmask for trigger and frequency select pin
_zero --- value 0
_one --- value TRUE
''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
Named registers, reserved space, not initialized
_mask_CLK --- clock pin bitmask, selected pins
_p --- pointer into stack
_n --- number of clock periods, must be multiple of eight.
******************************************************************************
Terms of Use:
Zerocat Chipflasher is free software: you can redistribute it and/or
modify it under the terms of the GNU General Public License as
published by the Free Software Foundation, either version 3 of the
License, or (at your option) any later version.
Zerocat Chipflasher is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
You should have received a copy of the GNU General Public License along
with Zerocat Chipflasher. If not, see <http://www.gnu.org/licenses/>.
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