Documentation for “Zerocat Chipflasher” as of Sat, 29 Mar 2025 14:41:58 +0100
Repository:
Version: v2.1.6-0-c57b46eb4
Branch: master
Propeller Spin/PASM Compiler 'OpenSpin' (c)2012-2016 Parallax Inc. DBA Parallax Semiconductor.
Version 1.00.78
Compiling...
../../firmware2/src/PCB.spin
|-time.spin
Done.
Program size is 480 bytes
______________________________________________________________________________
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Zerocat Chipflasher --- Flash free firmware, kick the Management Engine.
Copyright (C) 2020, 2021, 2022, 2024, 2025 Kai Mertens
File PCB.spin --- Check PCB features.
This file is part of the Zerocat Chipflasher.
See end of file for terms of use.
******************************************************************************
# Object Configuration (set via Makefile)
* Tell us which RS232 baudrate to use at start:
115200, 57600, 38400 or according to DIP Switch:
Switch #1: open = 57600, closed = 115200
* Tell us which SPI power-up type to use:
One Shot, Pulses, or according to DIP Switch:
Switch #2: open = One Shot, closed = Pulses
* Tell us which SPI power-off type to use:
Auto, Static, or according to DIP Switch:
Switch #3: open = auto, closed = static
* Tell us which SPI mode to use:
Mode 0, Mode 3, or according to DIP Switch:
Switch #4: open = Mode 0, closed = Mode 3
* Tell us which SPI clock driver strength to use:
100%, 75%, 50%, 25% or according to DIP Switch:
Switch #5..#6: oo = 25%, xo = 50%, ox = 75%, xx = 100%
# Interface Description
Object "../../firmware2/src/PCB" Interface:
PUB check_cable_SPI :
PUB is_monitor_VSPI(vboard)
PUB is_monitor_RPULL(vboard)
PUB is_monitor_RST(vboard)
PUB get_RST_INHIBIT(vboard)
PUB get_MASK_CEn_AVAIL(vboard)
PUB get_RPULL(vboard) :
PUB get_board_config(vboard) :
PUB get_SPI_power_on_type(cfg)
PUB get_SPI_power_off_type(cfg)
PUB get_SPI_power_config(cfg)
PUB get_SPI_mode(cfg)
PUB get_clk_driver(cfg)
PUB get_baudrate(cfg)
Program: 116 Longs
Variable: 0 Longs
# Loaded Objects
Load time object.
# Constants
## Sections in respect to PCB version
* PCBv2.1
* PCBv2.0
* PCBv2
* PCBv1
* Common
The PCB version is detected during runtime, that is why this object should
set RAM locations to appropriate values:
* RAM_PCB_VERSION
* RAM_RST_INIHIBIT
* RAM_ISMON_VSPI
* RAM_ISMON_RPULL
* RAM_ISMON_RST
* RAM_MASK_CEn_AVAIL
## PCBv2.1
* SPI_CEn1_PCBv2_1 -- Second Enable Pin, active low
* SPI_RPULL -- Used to load C_pull and to read R_pull value
* Hardcoded RC decay values for C_pull = 22nF, R_pull = 83..570 Ohm
## PCBv2.0
* SPI_CEn1_PCBv2_0 -- Second Enable Pin, active low
## PCBv2
* RS232_RST -- Sense RST input from host
* RST_INHIBIT -- Inhibit signal pin on board v2 for net RS232_RST
* ADC_OUT -- Sigma-delta ADC circuit, counter output
* ADC_CALIBRATION -- Sigma-delta ADC circuit, calibration pin, providing 0V/3.3V, tri-state when idle
* ADC_IN -- Sigma-delta ADC circuit, counter input
* DIP Switch 1: RS232 Baudrate
open = H, closed = L
RS232 Baudrate | SWDIP_1
----------------|-----------
57600 | H
115200 | L
* DIP Switch 2: SPI Power-up Type
open = H, closed = L
Power-up Type | SWDIP_2
----------------|-----------
one shot | H
pulses | L
* DIP Switch 3: SPI Power-off Type
open = H, closed = L
Power-off Type | SWDIP_3
----------------|-----------
auto | H
static | L
* DIP Switch 4: SPI Mode
open = H, closed = L
SPI Mode | SWDIP_4
----------|-----------
0 | H
3 | L
* DIP Switches 5..6: SPI Clock Driver
open = H, closed = L
SPI Clock Driver | SWDIP_5 | SWDIP_6
------------------|-----------|-----------
25% | H | H
50% | L | H
75% | H | L
100% | L | L
## PCBv1
* SPI_CEn1_PCBv1 -- Second Chip Enable Pin, active low
* RST_DISABLE -- Inhibit signal pin on board v1 for net RS232_RST
* Hardcoded DIP switch configuration for PCBv1 aka board-v1
- RS232 baudrate 115200
- Pulsed SPI power-on
- Automatic SPI power-off
- SPI mode 3
- Full clock driver strength
## Common
* DIP Switches A and B: Board Version
Devkit: open = H, closed straight = L, closed angular = H
open = H, closed = L
Board Version | SWDIP_B | SWDIP_A
---------------|-----------|-----------
V1 | L | L
V2 | L | H
V2.1 | L | H_delayed
V3 | H | L
V4 | H | H
On PCBv1, SWDIP_A is connected to GND via resistor.
On PCBv1, SWDIP_B is not connected but will hopefully read low at start.
On PCBv2.1, SWDIP_A is connected to an RC network.
It can be detected by driving SWDIP_A low and then waiting for a low-to-high transition.
* SPI Pins
* RS232 Pins
* SPI Modes
# Globals
# Functions
_______________________
PUB check_cable_SPI :
Check SPI Cable:
FALSE = Cable not present or twisted plug
TRUE = Cable present
____________________________
PUB is_monitor_VSPI(vboard)
Is SPI voltage monitor hardware available?
_____________________________
PUB is_monitor_RPULL(vboard)
Is SPI R_pull monitor hardware available?
___________________________
PUB is_monitor_RST(vboard)
Is pin RS232_RST monitored?
____________________________
PUB get_RST_INHIBIT(vboard)
Which pin is used to inhibit net RS232_RST?
_______________________________
PUB get_MASK_CEn_AVAIL(vboard)
Which pins are used to enable SPI CE#?
_________________________
PUB get_RPULL(vboard) :
Check value of R_pull,
which must not be smaller than 83 Ohm if driven by one pin.
________________________________
PUB get_board_config(vboard) :
Return six configuration bits in respect to parameter `vboard':
If `vboard' is 1, return the value of `PCBv1_CONFIG',
otherwise read DIP switches on PCB.
_______________________________
PUB get_SPI_power_on_type(cfg)
Return TRUE or FALSE according to bit position 2 of parameter `cfg',
corresponding to this translation:
bp2
---
0 = one shot SPI power-up (FALSE)
1 = pulsed SPI power-up (TRUE)
________________________________
PUB get_SPI_power_off_type(cfg)
Return TRUE or FALSE according to bit postion 3 of parameter `cfg',
corresponding to this translation:
bp3
---
0 = automatic suspend, if required (FALSE)
1 = static power, suspend inhibited (TRUE)
______________________________
PUB get_SPI_power_config(cfg)
Return value 0..3 according to bit positions 2 and 3 of parameter `cfg',
corresponding to this translation table:
bp2 | bp3
----|----
0 | 0 = one shot, auto
1 | 0 = pulses, auto
0 | 1 = one shot, static
1 | 1 = pulses, static
______________________
PUB get_SPI_mode(cfg)
Return SPI Mode according to bit position 4 of parameter `cfg':
0 -> Mode 0, 1 -> Mode 3
Alternatively, return modes according to preprocessor directive.
________________________
PUB get_clk_driver(cfg)
Return 0..3 according to bit positions 5 and 6 of parameter `cfg'.
Return values correspond to 25%(0)..100%(3) SPI clock driver strength.
Alternatively, return values according to preprocessor directive.
______________________
PUB get_baudrate(cfg)
Return baudrate according to bit position 1 of parameter `cfg':
0 -> 57600, 1 -> 115200
Alternatively, return baudrate according to preprocessor directive:
38400
******************************************************************************
Terms of Use:
Zerocat Chipflasher is free software: you can redistribute it and/or
modify it under the terms of the GNU General Public License as
published by the Free Software Foundation, either version 3 of the
License, or (at your option) any later version.
Zerocat Chipflasher is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
You should have received a copy of the GNU General Public License along
with Zerocat Chipflasher. If not, see <http://www.gnu.org/licenses/>.
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