Zerocat’s Coreboot Machines  v0.9.0
How to create Zerocat’s Coreboot Machines like the ZC-X200 and others...

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This file needs to get reviewed and updated. See Toolchain for most recent documentation.


This guide is about what steps are necessary to create a Zerocat Coreboot Machine. As these machines are online for sale, customers may take these notes as a reference.

Basically, a Zerocat Coreboot Machine is a Laptop which runs with a modified free coreboot firmware, holding a customized background image. Note all machines have been flashed with Zerocat’s Free-Design Chipflasher.

Available Machines

These are lists of elaborated example machines:

  1. Machines without Intel Manageability Engine (IME) hardware
    • ZC-X60, a modified ThinkPad X60 with 32bit (rarely 64bit) systemboard and up to 3.2GB RAM
    • ZC-T60, a modified ThinkPad T60 with 32bit systemboard but 64bit CPU and OS, up to 3.2GB RAM
  2. Machines with IME hardware, but its firmware update completely deleted
    • ZC-X200, a modified ThinkPad X200 with 64bit systemboard and up to 8GB RAM
    • ZC-T400, a modified ThinkPad T400 with 64bit systemboard, socketed CPU and up to 8GB RAM
  3. Machines with IME hardware, but its firmware update cleaned down to a rudimentary set
    • ZC-X220, a modified ThinkPad X220 with 64 bit system board and up to 16GB RAM
    • ZC-X230, a modified ThinkPad X230 with 64 bit system board and up to 16GB RAM
    • ZC-T430, a modified ThinkPad T430 with 64 bit system board and up to 16GB RAM
  4. Machines with IME hardware and its firmware unmodified

Basic Setup

In general, these machines come with the following software setup:



Resource Files

General Steps

Roadmap to your Coreboot ROM

In order to generate a complete coreboot.rom for your ThinkPad’s BIOS chip, several steps are required:

This guide is using 8MB images as default, please adapt to your specific BIOS chip.

Once you have your coreboot.rom available, you may use...

Projects that we Use

Elaborated Coreboot Build How-Tos

Ignore Coreboot Build Error?

When building the coreboot ROM images with older coreboot version, you may stumble over an error message like:

Created CBFS (capacity = 2096856 bytes)
CBFS fallback/romstage
E: Input file size (74892) greater than page size (65536).

However, the build process won't stop, it finally succeeds.

Please read Ignore Coreboot Build Error? to see our suggested approach.

Update! With coreboot 4.7 this seems to be solved.

CMOS Checksum Reset Required

If you are updating an old coreboot image, make sure a CMOS initialization is forced.
See Remind CMOS Checksum Reset to verify our experience.

External References

Kevin Keijzer provides his valuable coreboot settings and even a dedicated bash script for your reference:

The bash script automates the steps you take after compiling a ROM (like ich9gen, adding grub.cfg, cmos settings, etc.).


The files that ship with Zerocat’s Coreboot Machines Documentation may fall into five categories:

  1. hardware design sources (files from gEDA-gschem, PCB-Designer, OpenSCAD, LibreCAD, etc.)
  2. code sources (text files with syntax of C, ASM, Makefile, Propeller-Load Configuration, Doxyfile, bash, scheme, etc.)
  3. documentation files (markdown, simple text)
  4. graphics and photos (files made with Scribus, Inkscape, Gimp, etc.)
  5. logo files (files made with Scribus, Inkscape, Gimp, etc.)

In general the following rules apply:

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