82579LM/V GbE PHY for Intel 6 Series Express Chipset – Hardcoded Values More...

Detailed Description

82579LM/V GbE PHY for Intel 6 Series Express Chipset – Hardcoded Values

Usage

To be used with coreboot’s bincfg utility. Seems to be applicable for Intel 7 Series Express Chipset as well.

Refer to src/config-templates/i82579lmv-gbe-6series.spec for applicable namespace.

Notes

Bit l1_gbedis will be set with gen-rom-zerocat.sh --gbe disable, thus disabling GbE operation. The MAC Address will be cleared to ffffffffffff.
A custom MAC Address will be set with gen-rom-zerocat.sh --gbe set_<macaddr> and <macaddr> provided as a twelve digit, hexadecimal value without colons. Common first three octets are:
- 00aa00xxxxxx (Intel orig, as suggested by GbE datasheet)
- 00a0c9xxxxxx (Intel new, as suggested by GbE datasheet)
- 3c970exxxxxx (found on Lenovo X230 and family)
According to IEEE standards, a MAC Address of 000000000000 shall not be used.

Bit l1_gbedis will be cleared, thus enabling the GbE controller.
The Printed Board Assembly Number (PBA Number) is reset to 0xffffffff. This should make sense, as any else number would not necessarily match the physical product.
PXE Boot Agent options are disabled.
Bit 6 of word 0x19 is set in order to indicate a valid checksum, although this should be done by bincfg instead, when it updates the checksum_gbe word.
Some more values are set according to the defaults as mentioned in the datasheet, not to the values that are detected on a flash readout. See inline comments.

File Content

# Zerocat Coreboot-Machines --- Create Zerocat Coreboot Images
#
# Copyright (C) 2021 Kai Mertens <kmx@posteo.net>
#
# The Zerocat Coreboot-Machines Project is free software: you can redistribute
# it and/or modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation, either version 3 of
# the License, or (at your option) any later version.
#
# The Zerocat Coreboot-Machines Project is distributed in the hope that it
# will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty
# of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
# GNU General Public License for more details.
#
# This file is part of the Zerocat Coreboot-Machines Project.

# 82579LM/V GbE PHY Configuration Values for Intel 6 Series Express Chipset

# AUTOGENERATED SETTER BY BINCFG, then modified for disabled GbE:
{
  # Default MAC Address, cleared to: 0xffffffffffff
  # will be set by toolchain script
  "macaddress0" = 0xff,
  "macaddress1" = 0xff,
  "macaddress2" = 0xff,
  "macaddress3" = 0xff,
  "macaddress4" = 0xff,
  "macaddress5" = 0xff,

  # Hardcoded Settings
  "reserved03_1" = 0x0,
  "reserved03_lom" = 0x1,
  "reserved03_2" = 0x0,
  "reserved04" = 0xffff,
  "version05" = 0xd3,
  "reserved06" = 0xffff,              # default value as per datasheet, otherwise: 0x0149
  "reserved07" = 0xffff,              # default value as per datasheet, otherwise: 0x8000
  "pbalow" = 0xffff,                  # default value as per datasheet, otherwise: 0x1000
  "pbahigh" = 0xffff,
  "pci_loaddid" = 0x1,
  "pci_loadssid" = 0x1,
  "pci_reserved1" = 0x0,
  "pci_reserved2" = 0x0,
  "pci_pmen" = 0x1,
  "pci_auxpwr" = 0x1,
  "pci_reserved3" = 0x10,
  "ssdid" = 0x21f3,
  "ssvid" = 0x17aa,
  "did" = 0x1502,
  "reserved0e" = 0x0,
  "reserved0f" = 0x0,
  "lanpwr_d3pwr" = 0x2,
  "lanpwr_reserved" = 0x0,
  "lanpwr_d0pwr" = 0x7,
  "reserved11" = 0x0,
  "reserved12" = 0x0,
  "sh_dynclkgate" = 0x1,
  "sh_dmafreq" = 0x0,
  "sh_reserved1" = 0x1,
  "sh_force_halfduplex" = 0x0,
  "sh_force_lowspeed" = 0x0,
  "sh_reserved2" = 0x0,
  "sh_phyt" = 0x0,
  "sh_reserved3" = 0x1,
  "sh_phy_enpwrdown" = 0x0,
  "sh_reserved4" = 0x1,
  "sh_dismacsec" = 0x1,
  "sh_sign" = 0x2,
  "cw1_extcfgptr" = 0x28,
  "cw1_oemload" = 0x1,
  "cw1_enphywr" = 0x1,
  "cw1_reserved1" = 0x0,
  "cw2_reserved" = 0x0,
  "cw2_extphylen" = 0x12,
  "extcfg16" = 0x0,
  "l1_reserved1" = 0x0,
  "l1_lplu_all" = 0x0,
  "l1_lplu_non_d0a" = 0x1,
  "l1_gbedis_non_d0a" = 0x1,
  "l1_reserved2" = 0x0,

  # GbE: disabled
  # will be cleared by toolchain script
  "l1_gbedis" = 0x1,                  # disabled

  "l1_reserved3" = 0x0,
  "l02_led0mode" = 0x4,
  "l02_led0invert" = 0x0,
  "l02_led0blinks" = 0x0,
  "l02_led1mode" = 0x3,
  "l02_led1invert" = 0x0,
  "l02_led1blinks" = 0x1,
  "l02_led2mode" = 0x2,
  "l02_led2invert" = 0x1,
  "l02_led2blinks" = 0x0,
  "l02_blinkrate" = 0x0,

  "reserved19" = 0x2b40,              # bit 6 is set, indicating a valid checksum (which is not yet the case)

  "reserved1a_1" = 0x1,
  "reserved1a_2" = 0x421,
  "reserved1b" = 0x113,
  "reserved1c" = 0x1502,
  "reserved1d" = 0xbaad,
  "reserved1e" = 0x1502,
  "reserved1f" = 0x1503,
  "reserved20" = 0xbaad,
  "reserved21" = 0xbaad,
  "reserved22" = 0xbaad,
  "reserved23" = 0x1502,
  "reserved24_1" = 0x0,
  "reserved24_2" = 0x0,
  "reserved24_3" = 0x1,
  "reserved25_1" = 0x0,
  "reserved25_2" = 0x1,
  "reserved25_3" = 0x0,
  "reserved25_4" = 0x1,
  "reserved25_5" = 0x0,
  "reserved25_6" = 0x1,
  "reserved26_1" = 0x0,
  "reserved26_2" = 0x1,
  "reserved26_3" = 0x1,
  "reserved26_4" = 0x1,
  "reserved26_5" = 0x0,
  "reserved26_6" = 0x1,
  "reserved26_7" = 0x0,
  "reserved27" = 0x0080,              # default value as per datasheet, otherwise: 0x0886

  "reserved_"[0x08] = 0x0000,         # default value as per datasheet, otherwise:
  #"reserved_0" = 0x0,
  #"reserved_1" = 0x0,
  #"reserved_2" = 0x7,
  #"reserved_3" = 0x0,
  #"reserved_4" = 0x0,
  #"reserved_5" = 0x0,
  #"reserved_6" = 0x0,
  #"reserved_7" = 0xffff,

  # PXE Software Region
  # PXE Boot Agent: disabled
  "pxe30_protocolsel" = 0x0,
  "pxe30_reserved1" = 0x0,
  "pxe30_defbootsel" = 0x3,           # disabled: local boot only
  "pxe30_reserved2" = 0x0,
  "pxe30_prompttime" = 0x3,           # disabled
  "pxe30_dispsetup" = 0x0,            # disabled
  "pxe30_reserved3" = 0x0,
  "pxe30_forcespeed" = 0x0,
  "pxe30_forcefullduplex" = 0x0,
  "pxe30_reserved4" = 0x0,
  "pxe30_reserved5" = 0x0,
  "pxe31_disablemenu" = 0x1,          # disabled
  "pxe31_disabletitle" = 0x1,         # disabled
  "pxe31_disableprotsel" = 0x1,       # disabled
  "pxe31_disablebootorder" = 0x1,     # disabled
  "pxe31_disablelegacywak" = 0x1,     # disabled
  "pxe31_disableflash_pro" = 0x1,     # disabled
  "pxe31_reserved1" = 0x0,
  "pxe31_ibootagentmode" = 0x0,
  "pxe31_discontretry" = 0x0,
  "pxe31_reserved2" = 0x0,
  "pxe31_signature" = 0x3,            # set to 0x3 to indicate valid data in pxe31
  "pxe32_buildnum" = 0x28,            # default value as per datasheet, otherwise: 0x32
  "pxe32_minorversion" = 0x2,         # default value as per datasheet, otherwise: 0x5
  "pxe32_majorversion" = 0x1,         # default value as per datasheet
  "pxe33_basecodepresent" = 0x1,
  "pxe33_undipresent" = 0x1,
  "pxe33_reserved1" = 0x1,
  "pxe33_efiundipresent" = 0x0,
  "pxe33_iscsibootcapabsent" = 0x0,
  "pxe33_reserved2" = 0x0,
  "pxe33_signature" = 0x1,            # set to 0x1 to indicate valid data in pxe33

  "pxe_padding"[0x0b] = 0xffff,       # default value as per datasheet, otherwise:
  #"pxe_padding0" = 0xffff,
  #"pxe_padding1" = 0xffff,
  #"pxe_padding2" = 0xffff,
  #"pxe_padding3" = 0xffff,
  #"pxe_padding4" = 0xffff,
  #"pxe_padding5" = 0xffff,
  #"pxe_padding6" = 0xffff,
  #"pxe_padding7" = 0xffff,
  #"pxe_padding8" = 0xffff,
  #"pxe_padding9" = 0x0100,
  #"pxe_paddinga" = 0xffff,

  "checksum_gbe" = 0xffff,            # will be calculated by bincfg tool

  # Clear "phy_padding" Space
  "phy_padding"[0x0b] = 0xffff,       # default value as per datasheet, otherwise: 0x0000

  # Clear "padding" Space
  "padding"[0x7b5] = 0xffff           # default value as per datasheet, otherwise: see previous commits

}