Documentation for “Zerocat Chipflasher” as of Fri, 30 Sep 2022 18:26:53 +0200
Repository: git://zerocat.org/zerocat/projects/chipflasher
Version: v0.6.9-1497-91b1f109
Branch: flashrom-interface

../../firmware2/src/pins.spin.txt.html

Propeller Spin/PASM Compiler 'OpenSpin' (c)2012-2016 Parallax Inc. DBA Parallax Semiconductor.
Version 1.00.78
Compiling...
../../firmware2/src/pins.spin
Done.
Program size is 288 bytes
TYPE: 43   VALUE: 00000000 (00000000)   NAME: PIN_CEN1
TYPE: 43   VALUE: 00000001 (00000000)   NAME: PIN_CEN0
TYPE: 43   VALUE: 00000002 (00000000)   NAME: PIN_MOSI
TYPE: 43   VALUE: 00000003 (00000000)   NAME: PIN_WPN
TYPE: 43   VALUE: 00000004 (00000000)   NAME: PIN_SCLK3
TYPE: 43   VALUE: 00000005 (00000000)   NAME: PIN_SCLK2
TYPE: 43   VALUE: 00000006 (00000000)   NAME: PIN_SCLK1
TYPE: 43   VALUE: 00000007 (00000000)   NAME: PIN_SCLK0
TYPE: 43   VALUE: 00000008 (00000000)   NAME: PIN_MISO
TYPE: 43   VALUE: 00000009 (00000000)   NAME: PIN_PLUGTESTN
TYPE: 43   VALUE: 0000000A (00000000)   NAME: PIN_PNP
TYPE: 43   VALUE: 0000000C (00000000)   NAME: PIN_HOLDN
TYPE: 43   VALUE: 0000000D (00000000)   NAME: PIN_D3
TYPE: 43   VALUE: 0000000E (00000000)   NAME: PIN_D2
TYPE: 43   VALUE: 0000000F (00000000)   NAME: PIN_D1
TYPE: 43   VALUE: 0000001D (00000000)   NAME: PIN_TRIGGER
TYPE: 43   VALUE: 0000001E (00000000)   NAME: PIN_TX
TYPE: 43   VALUE: 0000001F (00000000)   NAME: PIN_RX
TYPE: 43   VALUE: 00000010 (00000000)   NAME: SWDIP_A
TYPE: 43   VALUE: 00000011 (00000000)   NAME: SWDIP_B
TYPE: 43   VALUE: 00000012 (00000000)   NAME: SWDIP_1
TYPE: 43   VALUE: 00000013 (00000000)   NAME: SWDIP_2
TYPE: 43   VALUE: 00000014 (00000000)   NAME: SWDIP_3
TYPE: 43   VALUE: 00000015 (00000000)   NAME: SWDIP_4
TYPE: 43   VALUE: 00000016 (00000000)   NAME: SWDIP_5
TYPE: 43   VALUE: 00000017 (00000000)   NAME: SWDIP_6
TYPE: 43   VALUE: 00000010 (00000000)   NAME: RST_DISABLE
TYPE: 43   VALUE: 00000018 (00000000)   NAME: RS232_RST
TYPE: 43   VALUE: 0000000B (00000000)   NAME: RST_INHIBIT
TYPE: 43   VALUE: 0000001B (00000000)   NAME: ADC_OUT
TYPE: 43   VALUE: 0000001A (00000000)   NAME: ADC_CALIBRATION
TYPE: 43   VALUE: 00000019 (00000000)   NAME: ADC_IN
TYPE: 43   VALUE: 00000003 (00000000)   NAME: MASK_CEN_AVAIL
TYPE: 43   VALUE: 000000F0 (00000000)   NAME: MASK_SCLK_AVAIL
TYPE: 43   VALUE: 000011FF (00000000)   NAME: MASK_SPI_BUS_AVAIL
TYPE: 43   VALUE: 000000F0 (00000000)   NAME: MASK_SCLK_ACTIVE100
TYPE: 43   VALUE: 000000E0 (00000000)   NAME: MASK_SCLK_ACTIVE75
TYPE: 43   VALUE: 000000C0 (00000000)   NAME: MASK_SCLK_ACTIVE50
TYPE: 43   VALUE: 00000080 (00000000)   NAME: MASK_SCLK_ACTIVE25
TYPE: 43   VALUE: 00000000 (00000000)   NAME: MASK_SCLK_ACTIVE0
TYPE: 43   VALUE: 000000F0 (00000000)   NAME: MASK_SCLK_ACTIVE
TYPE: 53   VALUE: 00000001 (00000004)   NAME: GET_BOARD_CONFIG
TYPE: 53   VALUE: 00000102 (00000004)   NAME: GET_BOARD_VERSION
TYPE: 53   VALUE: 00000103 (00000004)   NAME: GET_PIN_RSTINHIBIT
TYPE: 53   VALUE: 00000104 (00000004)   NAME: GET_MONITOR_HARDWARE
TYPE: 53   VALUE: 00000105 (00000004)   NAME: GET_POWERUP_TYPE
TYPE: 53   VALUE: 00000106 (00000004)   NAME: GET_ACCESS_TYPE
TYPE: 53   VALUE: 00000107 (00000004)   NAME: GET_MODE_SPI
TYPE: 53   VALUE: 00000108 (00000004)   NAME: GET_DRIVER_STRENGTH
TYPE: 53   VALUE: 00000109 (00000004)   NAME: GET_BAUDRATE
TYPE: 53   VALUE: 0000010A (00000004)   NAME: HIGH
TYPE: 53   VALUE: 0000010B (00000004)   NAME: LOW
TYPE: 4E   VALUE: 00000000 (00000000)   NAME: R
TYPE: 4E   VALUE: 00000004 (00000000)   NAME: CFG
TYPE: 4E   VALUE: 00000004 (00000000)   NAME: CFG
TYPE: 4E   VALUE: 00000004 (00000000)   NAME: CFG
TYPE: 4E   VALUE: 00000004 (00000000)   NAME: CFG
TYPE: 4E   VALUE: 00000004 (00000000)   NAME: CFG
TYPE: 4E   VALUE: 00000004 (00000000)   NAME: CFG
TYPE: 4E   VALUE: 00000004 (00000000)   NAME: CFG
TYPE: 4E   VALUE: 00000004 (00000000)   NAME: CFG
TYPE: 4E   VALUE: 00000004 (00000000)   NAME: PIN_NUMBER
TYPE: 4E   VALUE: 00000004 (00000000)   NAME: PIN_NUMBER

Distilled longs: 0

OBJ bytes: 1058

_CLKMODE: 00
_CLKFREQ: 00B71B00

0000- 00 00 10 01 10 01 0C 00 30 00 00 00 4B 00 00 00   ........0...K...
0010- 53 00 00 00 65 00 00 00 75 00 00 00 8A 00 00 00   S...e...u.......
0020- 9F 00 00 00 BB 00 00 00 D1 00 00 00 FD 00 00 00   ................
0030- 06 01 00 00 38 17 38 12 3E 92 E7 37 25 E8 61 37   ....8.8.>..7%.a7
0040- 00 62 43 38 11 37 03 3E 92 37 21 E8 62 4A 32 64   .bC8.7.>.7!.bJ2d
0050- 37 21 E8 36 EC 33 32 38 64 00 64 05 02 36 0D 04   7!.6.328d.d..6..
0060- 38 0B 33 0C 37 03 33 0C 32 38 74 00 64 05 02 36   8.3.7.3.28t.d..6
0070- 0D 03 34 33 0C 35 33 0C 32 38 89 00 64 05 02 36   ..43.53.28..d..6
0080- 0D 08 64 37 06 E8 35 FB 33 0C 34 33 0C 32 38 9E   ..d7..5.3.43.28.
0090- 00 64 05 02 36 0D 08 64 37 05 E8 35 FB 33 0C 35   .d..6..d7..5.3.5
00A0- 33 0C 32 38 BA 00 64 05 02 36 0D 0E 64 37 03 E8   3.28..d..6..d7..
00B0- 0A 04 35 33 04 03 37 21 33 0C 37 21 33 0C 32 38   ..53..7!3.7!3.28
00C0- D0 00 64 05 02 36 0D 09 64 38 0C E8 37 00 E2 33   ..d..6..d8..7..3
00D0- 0C 36 33 0C 32 38 FC 00 64 05 02 36 0D 1C 38 F5   .63.28..d..6..8.
00E0- 64 37 04 E8 38 05 E2 35 0D 04 36 0D 07 0C 3A 01   d7..8..5..6...:.
00F0- C2 00 33 0C 39 E1 00 33 0C 0C 3A 01 C2 00 33 0C   ..3.9..3..:...3.
0100- 32 64 3D D4 1C 64 3D D6 1C 32 64 3D D4 18 64 3D   2d=..d=..2d=..d=
0110- D6 1C 32 00 74 50 49 4E 5F 43 45 4E 31 10 00 00   ..2.tPIN_CEN1...
0120- 00 00 50 49 4E 5F 43 45 4E 30 10 01 00 00 00 50   ..PIN_CEN0.....P
0130- 49 4E 5F 4D 4F 53 49 10 02 00 00 00 50 49 4E 5F   IN_MOSI.....PIN_
0140- 57 50 4E 10 03 00 00 00 50 49 4E 5F 53 43 4C 4B   WPN.....PIN_SCLK
0150- 33 10 04 00 00 00 50 49 4E 5F 53 43 4C 4B 32 10   3.....PIN_SCLK2.
0160- 05 00 00 00 50 49 4E 5F 53 43 4C 4B 31 10 06 00   ....PIN_SCLK1...
0170- 00 00 50 49 4E 5F 53 43 4C 4B 30 10 07 00 00 00   ..PIN_SCLK0.....
0180- 50 49 4E 5F 4D 49 53 4F 10 08 00 00 00 50 49 4E   PIN_MISO.....PIN
0190- 5F 50 4C 55 47 54 45 53 54 4E 10 09 00 00 00 50   _PLUGTESTN.....P
01A0- 49 4E 5F 50 4E 50 10 0A 00 00 00 50 49 4E 5F 48   IN_PNP.....PIN_H
01B0- 4F 4C 44 4E 10 0C 00 00 00 50 49 4E 5F 44 33 10   OLDN.....PIN_D3.
01C0- 0D 00 00 00 50 49 4E 5F 44 32 10 0E 00 00 00 50   ....PIN_D2.....P
01D0- 49 4E 5F 44 31 10 0F 00 00 00 50 49 4E 5F 54 52   IN_D1.....PIN_TR
01E0- 49 47 47 45 52 10 1D 00 00 00 50 49 4E 5F 54 58   IGGER.....PIN_TX
01F0- 10 1E 00 00 00 50 49 4E 5F 52 58 10 1F 00 00 00   .....PIN_RX.....
0200- 53 57 44 49 50 5F 41 10 10 00 00 00 53 57 44 49   SWDIP_A.....SWDI
0210- 50 5F 42 10 11 00 00 00 53 57 44 49 50 5F 31 10   P_B.....SWDIP_1.
0220- 12 00 00 00 53 57 44 49 50 5F 32 10 13 00 00 00   ....SWDIP_2.....
0230- 53 57 44 49 50 5F 33 10 14 00 00 00 53 57 44 49   SWDIP_3.....SWDI
0240- 50 5F 34 10 15 00 00 00 53 57 44 49 50 5F 35 10   P_4.....SWDIP_5.
0250- 16 00 00 00 53 57 44 49 50 5F 36 10 17 00 00 00   ....SWDIP_6.....
0260- 52 53 54 5F 44 49 53 41 42 4C 45 10 10 00 00 00   RST_DISABLE.....
0270- 52 53 32 33 32 5F 52 53 54 10 18 00 00 00 52 53   RS232_RST.....RS
0280- 54 5F 49 4E 48 49 42 49 54 10 0B 00 00 00 41 44   T_INHIBIT.....AD
0290- 43 5F 4F 55 54 10 1B 00 00 00 41 44 43 5F 43 41   C_OUT.....ADC_CA
02A0- 4C 49 42 52 41 54 49 4F 4E 10 1A 00 00 00 41 44   LIBRATION.....AD
02B0- 43 5F 49 4E 10 19 00 00 00 4D 41 53 4B 5F 43 45   C_IN.....MASK_CE
02C0- 4E 5F 41 56 41 49 4C 10 03 00 00 00 4D 41 53 4B   N_AVAIL.....MASK
02D0- 5F 53 43 4C 4B 5F 41 56 41 49 4C 10 F0 00 00 00   _SCLK_AVAIL.....
02E0- 4D 41 53 4B 5F 53 50 49 5F 42 55 53 5F 41 56 41   MASK_SPI_BUS_AVA
02F0- 49 4C 10 FF 11 00 00 4D 41 53 4B 5F 53 43 4C 4B   IL.....MASK_SCLK
0300- 5F 41 43 54 49 56 45 31 30 30 10 F0 00 00 00 4D   _ACTIVE100.....M
0310- 41 53 4B 5F 53 43 4C 4B 5F 41 43 54 49 56 45 37   ASK_SCLK_ACTIVE7
0320- 35 10 E0 00 00 00 4D 41 53 4B 5F 53 43 4C 4B 5F   5.....MASK_SCLK_
0330- 41 43 54 49 56 45 35 30 10 C0 00 00 00 4D 41 53   ACTIVE50.....MAS
0340- 4B 5F 53 43 4C 4B 5F 41 43 54 49 56 45 32 35 10   K_SCLK_ACTIVE25.
0350- 80 00 00 00 4D 41 53 4B 5F 53 43 4C 4B 5F 41 43   ....MASK_SCLK_AC
0360- 54 49 56 45 30 10 00 00 00 00 4D 41 53 4B 5F 53   TIVE0.....MASK_S
0370- 43 4C 4B 5F 41 43 54 49 56 45 10 F0 00 00 00 47   CLK_ACTIVE.....G
0380- 45 54 5F 42 4F 41 52 44 5F 43 4F 4E 46 49 47 00   ET_BOARD_CONFIG.
0390- 47 45 54 5F 42 4F 41 52 44 5F 56 45 52 53 49 4F   GET_BOARD_VERSIO
03A0- 4E 01 47 45 54 5F 50 49 4E 5F 52 53 54 49 4E 48   N.GET_PIN_RSTINH
03B0- 49 42 49 54 01 47 45 54 5F 4D 4F 4E 49 54 4F 52   IBIT.GET_MONITOR
03C0- 5F 48 41 52 44 57 41 52 45 01 47 45 54 5F 50 4F   _HARDWARE.GET_PO
03D0- 57 45 52 55 50 5F 54 59 50 45 01 47 45 54 5F 41   WERUP_TYPE.GET_A
03E0- 43 43 45 53 53 5F 54 59 50 45 01 47 45 54 5F 4D   CCESS_TYPE.GET_M
03F0- 4F 44 45 5F 53 50 49 01 47 45 54 5F 44 52 49 56   ODE_SPI.GET_DRIV
0400- 45 52 5F 53 54 52 45 4E 47 54 48 01 47 45 54 5F   ER_STRENGTH.GET_
0410- 42 41 55 44 52 41 54 45 01 48 49 47 48 01 4C 4F   BAUDRATE.HIGH.LO
0420- 57 01                                             W.

______________________________________________________________________________
********************************************************* File starts here ***
Zerocat Chipflasher --- Flash free firmware, kick the Management Engine.

Copyright (C) 2020, 2021, 2022  Kai Mertens 

File pins.spin --- Define Propeller Pins
Compare to: firmware/src/libkick/proppins.h

This file is part of the Zerocat Chipflasher.

See end of file for terms of use.

******************************************************************************

# Object Configuration (set via Makefile)

* Tell us which SPI Clock Driver Strength to use:

    100%, 75%, 50%, 25% or according to DIP Switch (default)

* Tell us which SPI mode to use:

    Mode 0, Mode 3, or according to DIP Switch (default)

* Tell us which RS232 Baudrate to use:

    115200, 57600, 38400 or according to DIP Switch (default)

* Tell us which SPI Bus Access Time to use:

    Continuous Access, Short Access, or according to DIP Switch (default)

* Tell us which SPI Power-up Type to use:

    One Shot, Repetitive, or according to DIP Switch (default)



# Object Summary

Object "../../firmware2/src/pins" Interface:

PUB  get_board_config : 
PUB  get_board_version(cfg)
PUB  get_pin_RSTinhibit(cfg)
PUB  get_monitor_hardware(cfg)
PUB  get_powerup_type(cfg)
PUB  get_access_type(cfg)
PUB  get_mode_SPI(cfg)
PUB  get_driver_strength(cfg)
PUB  get_baudrate(cfg)
PUB  high(pin_number)
PUB  low(pin_number)

Program:  68 Longs
Variable: 0 Longs


# Constants

Fast Addressable Pins 0..8

Slow Addressable Pins 9..31

DIP Switches A and B, otherwise hardwired: Board Version

  open = H, closed straight = L, closed angular = H

  Board Version  |  SWDIP_B  |  SWDIP_A
  ---------------|-----------|-----------
             V1  |        L  |        L
             V2  |        L  |        H
             V3  |        H  |        L
             V4  |        H  |        H

  Switch SWDIP_B is tristate on board v1,
  but will hopefully read low.

  SWDIP_A
  SWDIP_B

DIP Switches 1..2: SPI Clock Driver

  open = H, closed = L

  SPI Clock Driver  |  SWDIP_2  |  SWDIP_1
  ------------------|-----------|-----------
               25%  |        H  |        H
               50%  |        H  |        L
               75%  |        L  |        H
              100%  |        L  |        L

  SWDIP_1
  SWDIP_2

DIP Switch 3: SPI Mode

  open = H, closed = L

  SPI Mode  |  SWDIP_3
  ----------|-----------
         0  |        H
         3  |        L

  SWDIP_3

DIP Switch 4: RS232 Baudrate

  open = H, closed = L

  RS232 Baudrate  |  SWDIP_4
  ----------------|-----------
           57600  |        H
          115200  |        L

  SWDIP_4

DIP Switch 5: Chip Register is volatile

  open = H, closed = L

  volatile?  |  SWDIP_5
  -----------|-----------
    unknown  |        H
   volatile  |        L

  SWDIP_5

DIP Switch 6: Power-up Type

  open = H, closed = L

  Power-up Type  |  SWDIP_6
  ---------------|-----------
           once  |        H
      repetitve  |        L

  SWDIP_6

Pins in respect to Board Version

  Board v1:

  RST_DISABLE       --- Inhibit signal pin on board v1 for net RS232_RST

  Board v2:

  RS232_RST         --- Sense RST input from host
  RST_INHIBIT       --- Inhibit signal pin on board v2 for net RS232_RST
  ADC_OUT           --- Sigma-delta ADC circuit, counter output
  ADC_CALIBRATION   --- Sigma-delta ADC circuit, calibration pin, providing 0V/3.3V, tri-state when idle
  ADC_IN            --- Sigma-delta ADC circuit, counter input

Compound Bitmasks
  MASK_CEn_AVAIL      --- bitmask for all available CEn pins
  MASK_SCLK_AVAIL     --- bitmask for all available SPI clock pins
  MASK_SPI_BUS_AVAIL  --- bitmask for pins that form the SPI Bus
  MASK_SCLK_ACTIVE100 --- bitmask for selected SPI clock pins in use: four
  MASK_SCLK_ACTIVE75  --- bitmask for selected SPI clock pins in use: three
  MASK_SCLK_ACTIVE50  --- bitmask for selected SPI clock pins in use: two
  MASK_SCLK_ACTIVE25  --- bitmask for selected SPI clock pins in use: one
  MASK_SCLK_ACTIVE0   --- bitmask for selected SPI clock pins in use: none
  MASK_SCLK_ACTIVE    --- bitmask for selected SPI clock pins in use, not used by flashrom interface


# Functions

________________________
PUB  get_board_config : 

Retrieve board configuration from DIP switches.

___________________________
PUB  get_board_version(cfg)

Get board version according to board configuration.

____________________________
PUB  get_pin_RSTinhibit(cfg)

Which pin is used to inhibit net RS232_RST?

______________________________
PUB  get_monitor_hardware(cfg)

Is SPI voltage monitor hardware available?

__________________________
PUB  get_powerup_type(cfg)

Check DIP switch 6:
Returns TRUE for type repetitive, otherwise FALSE.

_________________________
PUB  get_access_type(cfg)

Check DIP switch 5, set short access (i.e. T530?)
TRUE: short access
FALSE: continued access

______________________
PUB  get_mode_SPI(cfg)

Check DIP switch 3, set SPI mode

_____________________________
PUB  get_driver_strength(cfg)

Check DIP switches 1 and 2, set driver strength.

______________________
PUB  get_baudrate(cfg)

Return baudrate according to DIP switch 4.

_____________________
PUB  high(pin_number)

Set pin high (1).
Direction register bit is configured to output.

____________________
PUB  low(pin_number)

Set pin low (0).
Direction register bit is configured to output.


******************************************************************************
Terms of Use:

Zerocat Chipflasher is free software: you can redistribute it and/or
modify it under the terms of the GNU General Public License as
published by the Free Software Foundation, either version 3 of the
License, or (at your option) any later version.

Zerocat Chipflasher is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
General Public License for more details.

You should have received a copy of the GNU General Public License along
with Zerocat Chipflasher.  If not, see <http://www.gnu.org/licenses/>.

************************************************************** End of File ***